Tpm 1.2 - Clevo W270CZQ Service Manual

Schematic Diagrams
3G, TPM
MINI CARD 3G(Port 6)
[28]
[13]
[13]
[13]
[13]
Sheet 23 of 44
3G, TPM

TPM 1.2

B - 24 3G, TPM
*
J_3G1
1 2
WAKE# 3.3VAUX_0
3 6
COEX1 1.5V_0
5 8 UIM_PWR
COEX2 UIM_PWR 10
UIM_DATA
UIM_DATA
7 12 UIM_CLK
CLKREQ# UIM_CLK
11 14 UIM_RST
REFCLK- UIM_RESET
13 16 UIM_VPP
9 REFCLK+ UIM_VPP
GND0
15 4
GND1 GND5
KEY
21 18
27 GND2 GND6 26
29 GND3 GND7 34
GND4 GND8
40
GND9
35 50
3G_DET#
23 GND11 GND10
C645 *0.01u_16V_X7R_04
SATARXP4
25 PETn0 20
C646 *0.01u_16V_X7R_04
SATARXN4 PETp0 W_DISABLE#
31 22
C647 *0.01u_16V_X7R_04
SATATXN4 PERn0 PERSET#
C648 *0.01u_16V_X7R_04 33 30
SATATXP4
PERp0 SMB_CLK
32
SMB_DATA
17 36
Reserv ed0 USB_D-
3G_3.3V 19 38
Reserv ed1 USB_D+
37
60mils 60mils
GND12
39 24
3.3VAUX_3 3.3VAUX_1
41 28
* *
3.3VAUX_4 1.5V_1
43 48
GND13 1.5V_2
C242 C267 45 52
47 Reserv ed2 3.3VAUX_2 42
49 Reserv ed3 LED_WWAN# 44
*0.1u_16V_Y 5V_04 *10u_10V_Y5V_08
Reserv ed4 LED_WLAN#
51 46
Reserv ed5 LED_WPAN#
*88910-5204M-01
W/ TPM¡G
¥´ * ªº¹s¥ó-n¤W¥ó¡A¥]§t¡G
PCLK_TPM¡GR214(P17)
Asserted before entering S3
LPC reset timing:
LPCPD# inactive to LRST# inactive 32~96us
*
U28
26
[13,28] LPC_AD0 LAD0 VDD1
23
[13,28] LPC_AD1 LAD1 VDD2
20
[13,28] LPC_AD2
LAD2 VDD3
17
[13,28] LPC_AD3
LAD3
21
TPM
[17] PCLK_TPM LCLK
22
[13,28] LPC_FRAME#
16 LFRAME# VSB
[3,11,17] PLT_RST# LRESET#
27
[13,28] SERIRQ SERIRQ
15
[15] PM_CLKRUN# CLKRUN#
28
R612 *0_04 S4_STATE#_R
[15] S4_STATE# LPCPD# GPIO
GPIO2
TPM_BADD 9
TESTBI/BADD
7 XTALI
TPM_PP
PP
XTALO
TPM3001 1
3 NC_1
TPM3002
NC_2 GND_1
12
TPM3003
NC_3 GND_2
GND_3
8
TESTI GND_4
*SLB9635TT
6-03-09635-0H3 Ver¡G3.17
W/ 3G¡G
¥´ * ªº¹s¥ó-n¤W¥ó
3.3V
3G_3.3V
60mils
* * *
C212 C209 C287
+
*220u_6.3V_6.3*6.3*4.2
From H8 default HI
3G_EN [28]
USB_PN11 [17]
USB_PP11 [17]
3G_3.3V
* 3G_3.3V *
C286 C235 UIM_CLK
+ UIM_RST
*220u_4V_V_A *0.1u_16V_Y5V_04 UIM_PWR
C489
*22p_50V_NPO_04
R724 *0_06
3.3VS
*
R725 *0_06
VDD3
* * *
C508 C285 C294 C300
10
*0.1u_16V_Y 5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *1u_10V_Y 5V_06
19
24
5
* VDD3
C282
*0.1u_16V_Y5V_04
6
TPM3004
2 TPM3005
13 XTALI
*
X8
14 XTALO *1TJS125DJ4A420P_32.768KHz
4 1
4 3 2
* *
11
18
C305 C302
25
*18p_50V_NPO_04 *18p_50V_NPO_04
[2,3,6,11,13,14,15,17,18,19,20,22,26,28,32,34,35,36]
[3,9,10,11,12,13,14,15,16,17,18,19,20,24,25,28,29,30,31,32,37]
3G POWER
*
3G_3.3V
Q30 *MTP3415KN3
>120 mil >120 mil
S D
* * *
*
C500 C507 C483
R515
*0.1u_16V_Y5V_04
*
*0.1u_16V_Y5V_04 *10_06
R520
*100K_04
* *
R519 *330K_04 G Q33
*
*2SK3018S3
Q35
G
[28] 3G_PWR_EN
*2SK3018S3
SIM CONN
R503 *4.7K_04
*
J_SIM1
LOCK
(TOP VIEW)
C3 C7
UIM_DATA
UIM_CLK UIM_DATA
C2 C6 UIM_VPP
UIM_RST UIM_VPP
C1 C5
UIM_PWR UIM_GND
C470 C469 C471
OPEN
*C1770661-1 SIMLOCK *22p_50V_NPO_04 *22p_50V_NPO_04 *22p_50V_NPO_04
*
R615 *10K_04
VDD3
S4_STATE#_R R613 *10K_04
3.3VS
TPM_PP
R341 *10K_04
*
TPM_BADD
R348 *10K_04
R352 *10K_04
H: ACCESS
TPM _PP
L: NORMAL ( Int. PD ) De fault
H: 4E/ 4F H De fault
TPM _BADD
L: 2E/ 2F H
R349
*33_04
PCLK_TPM PCLK_TPM1 C292 *10p_50V_NPO_04
[13,22,24,26,28,31,32,33,39] VDD3
3.3V
3.3VS