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3.2
TPA6047A4EVM PCB Layers
SPKR_RIN
SPKR_LIN
SLOU240 – August 2007
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GND
VDD
<
1
<
1
<
1
<
0
<
0
<
0
HP_EN
C11
C1
U1
C2
C9
JP1
<
1
>
JP2
<
0>
GAIN0
GAIN1
TPA6047A4RHB EVM
Figure 2. Top Side Layout
HPVDD
ROUT+
ROUT-
C12
C13
C15
C16
LOUT-
LOUT+
Schematic and Bill of Materials
HPL
HPR
List of Tables
5
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