Boser HS-2605 Manual page 29

Eden embedded engine board
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JP4(5-10): WDT Timeout Period Select
Period
1 sec (default)
2 sec
10 sec
20 sec
110 sec
220 sec
The Watchdog Timer is disabled after the system Power-On. It can be
enabled via an Enable cycle and reading the control port (443H), or via
a Refresh cycle and reading the control port (443H), or via a Disable
cycle and reading the disable control port (045H).
After an Enable cycle of WDT, user must immediately execute a
Refresh cycle to WDT before its period setting comes to an end every
1, 2, 10, 20, 110 or 220 seconds. If the Refresh cycle does not activate
before WDT period cycle, the onboard WDT architecture will issue a
Reset or NMI cycle to the system. There are three I/O ports that control
the Watchdog Timer.
443H
443H
045H
The following sample program shows how to Enable, Disable and
Refresh the Watchdog Timer:
WDT_EN_RF
EQU
WDT_DIS
EQU
WT_Enable
PUSH
PUSH
MOV
IN
POP
POP
RET
WT_Refresh
PUSH
PUSH
MOV
IN
POP
POP
RET
PINS 5-6
PINS 7-8 PINS 9-10
Short
Short
Open
Short
Short
Open
Open
Open
Short
Short
Open
Short
I/O Read
The Enable cycle
I/O Read
The Refresh cycle
I/O Read
The Disable cycle
0443H
0045H
AX
; keep AX DX
DX
DX,WDT_EN_RF
; enable the WDT
AL,DX
DX
; get back AX, DX
AX
AX
; keep AX, DX
DX
DX,WDT_ET_RF
; refresh the WDT
AL,DX
DX
; get back AX, DX
AX
Short
Short
Short
Short
Open
Open
23

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