NEC A1160 Technical Overview page 22

Processors
steppings. A stepping is a version of the processor that is associated with a set of fixes
and errata.
When mixing processors or processor steppings, observe the following rules:
•
Each processor board (or each cell) supports only one processor family.
•
All processors in a partition must be the same frequency and have the same
amount of cache.
Processor Voltage Regulator Modules
The processor board contains voltage regulator modules that convert the 12-volt DC
from the power supplies to the voltage required by the processors.
Node Controller
The node controller provides scalability, native PCIe, and fully buffered DIMM memory
for the Express5800/A1160 cell. It maintains coherency between the processors,
memory, and I
O subsystem and contains extensive error detection and correction logic.
The node controller provides the following interfaces:
•
Four dedicated high-speed interconnect interfaces for the processor sockets (one
interface for each socket).
•
Four fully buffered DIMM interfaces.
•
Three x8 PCIe interfaces
•
One x4 PCIe interface
•
Three high-speed serial interfaces that support 10 high-speed serial lanes in
parallel for each direction for each interface. The interface enables a cell to be
connected to up to three other cells using interconnect cables that run between the
interconnect ports on the rear of the cell.
•
Enterprise South Bridge Interface (ESI) to the I/O controller hub (south bridge)
Figure 2-3 illustrates the node controller.
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