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Octek BISON II Manual

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BISON II

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  • Page 1 BISON II...
  • Page 2 The material in this manual is for information only and is subject to change without notice. REVISION: 1.0 IBM, IBM PC/XT/AT, PC-DOS, MS-DOS, OS/2, INTEL, AMI, Pentium ARE THE TRADEMARKS OR REGISTERED TRADEMARKS OF THEIR RESPECTIVE OWNERS.
  • Page 3 RADIO FREQUENCY INTERFERENCE STATEMENT This equipment generates and uses radio frequency energy and if not installed and used properly, that is, in strict accordance with the manufacturer's instructions, may cause interference with radio and television reception. If this equipment does cause interference to radio or TV reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one...
  • Page 4 Note Electronic components are sensitive to dust and dirt. Do inspect and clean the computer system regularly. Turn off the power whenever you install or remove any connector, memory module and add-on card. Before turning on the power, make sure that all the connectors, memory modules and add-on cards are secured.

  • Page 5: Table Of Contents

    Table of Content INTRODUCTION Chapter 1 GENERAL FEATURES Chapter 2 Specifications The Central Processing Unit Cache Subsystem 2-4 DRAM Subsystem 2-4 DRAM Configuration CONFIGURING THE SYSTEM Chapter 3 Installing the Processor Installing RAM Modules Configuring the Cache Memory 3-3 Control of System Speed 3-4 Reset CMOS Setup Information 3-4 System Board Jumper and Connector Summary...
  • Page 6 TECHNICAL INFORMATION Chapter 4 Memory Mapping I/O Address Map System Timers System Interrupts 4-6 Direct Memory Access (DMA) Real Time Clock and CMOS RAM 4-8 CMOS RAM Address Map 4-9 Real Time Clock Information 4-10 System Expansion Bus 4-11 Appendix A OPERATION AND MAINTENANCE Static Electricity Keeping The System Cool A-1 Cleaning The "Golden Finger"...

  • Page 7: Chapter 1 Introduction

    Chapter 1 Introduction ____________________________________________________ OCTEK BISON II is a workstation class platform that can meet the demand of most time critical applications nowadays. With the Pentium processor and 64 bit interleaved memory system, it delivers the highest performance among the PC/AT class machines that ever been.
  • Page 8 THIS PAGE IS INTENTIONALLY LEFT BLANK...

  • Page 9: Chapter 2 General Features

    Chapter 2 General Features ____________________________________________________ Specifications: Processor: Pentium 60MHz or 66MHz CPU Speed: Turbo/normal speed I/O Slot: Six 16 bit ISA slots One 8 bit ISA slot Two VESA VL-bus slots (supporting one VL master) Cache: Internal cache inside Pentium: 8K instruction cache 8K data cache External cache:...
  • Page 10 GENERAL FEATURES _________________________________________________________________________ DRAM: Supports 4 banks of 32 bit wide SIMM modules with 1MB, 4MB or 16MB page-mode DRAMs. Supports DRAM configurations from 2MB to 64MB. Two non-cacheable regions for VL/ISA bus masters. DRAM post write buffer. Supports pipeline DRAM burst cycles. Others: Fast GateA20 and reset emulations.

  • Page 11: The Central Processing Unit

    GENERAL FEATURES _________________________________________________________________________ The Central Processing Unit The Pentium processor is the next-generation member of 80486 family of microprocessors. It contains all of the features of the 80486 and provides significant enhancments and additions. It is 100% binary compatible with the X86 CPU. The superscalar architecture of the Pentium processor contains two instruction pipelines and floating-point unit on the Pentium processor are...

  • Page 12: Cache Subsystem

    Cache Subsystem The external cache of BISON II is write-back, direct-mapped with sizes of 64K, 128K, 256K or 512K. It is organized by single or dual bank. Dual bank is accessed in interleaved manner and it can support 3-2-2-2 burst read cycle.
  • Page 13 GENERAL FEATURES _________________________________________________________________________ Shadow RAM is available as an option. System BIOS and video BIOS residing in slow EPROM can be copied to local DRAM to speed up accesses to BIOS code. Shadow RAM addresses range from C0000h to FFFFFh. 16K granularity is provided for address range C0000h to EFFFFh, while the area F0000h - FFFFFh can only be shadowed as a whole.

  • Page 14: Dram Configuration

    GENERAL FEATURES _________________________________________________________________________ DRAM CONFIGURATION Bank 0 + Bank 1 Bank 2 + Bank 3 Total (bytes) (bits) (bits) 256K x 64 256K x 64 256K x 64 256K x 64 1M x 64 256K x 64 4M x 64 1M x 64 1M x 64 1M x 64...

  • Page 15: Configuring The System

    Chapter 3 Configuring The System ____________________________________________________ Important Note: Turn off the power before installing or replacing any component. Installing the processor Pentium is a 273 pin PGA device. Make sure the pin 1 of Pentium (with a notch at the corner) is line up with the pin 1 of the socket.

  • Page 16: Installing Ram Modules

    CONFIGURING THE SYSTEM _________________________________________________________________________ Installing RAM modules BISON II has four banks on board for SIMM modules. Bank 0 and bank 1 must be installed first. Make sure pin 1 of the SIMM module inserted near the power connector. Lock it firmly with the latches on the socket.

  • Page 17: Configuring The Cache Memory

    CONFIGURING THE SYSTEM _________________________________________________________________________ Configuring the cache memory Note: If you have any question about the configuration of the cache memory, consult your local dealer. Improper configuration will cause the system malfunction. The external cache is organized by single bank or dual banks with sizes of 64KB to 512KB. Follow the tables below to configure the system.

  • Page 18: Control Of System Speed

    CONFIGURING THE SYSTEM _________________________________________________________________________ CONTROL OF SYSTEM SPEED System speed can be controlled by keyboard and turbo switch. To change the speed by keyboard, use `-' and `+' of the numeric keypad. Press `Ctrl' `Alt' and `-' for slow speed and press `Ctrl' `Alt' and `+' for fast speed.
  • Page 19 CONFIGURING THE SYSTEM _________________________________________________________________________...

  • Page 20: System Board Jumper And Connector

    CONFIGURING THE SYSTEM _________________________________________________________________________ SYSTEM BOARD JUMPER AND CONNECTOR SUMMARY Description Keyboard Connector Reset CMOS J10,J11 Power Supply Connector External Battery Connector Display Selection Cache Size Selection JP19-JP23 Cache Size Selection JP20 Power LED 6 Ext-Lock Connector JP18 Speaker Connector JP24 Power-Good Selection JP27...

  • Page 21: System Board Jumper Setting

    CONFIGURING THE SYSTEM _________________________________________________________________________ SYSTEM BOARD JUMPER SETTING There are several options which allows user to select by hardware switches. JP2 - Display Selection CLOSE CGA, EGA, VGA (default) OPEN Monochrome display JP24 - Power-good Selection Power-good signal from power supply (default) On board power-good signal JP27 - Cooling Fan Power Selection 12Vdc (default)

  • Page 22: System Board Connectors

    CONFIGURING THE SYSTEM _________________________________________________________________________ SYSTEM BOARD CONNECTORS Under typical conditions, these connectors should be connected to the indicators and switches of the system unit. The functions and the pin assignment of the connectors on the motherboard are listed below. JP18 - Speaker Connector Assignment Data out +5 Vdc...
  • Page 23 CONFIGURING THE SYSTEM _________________________________________________________________________ J20 - Power LED & Ext-Lock Connector Assignment +5 Vdc Ground Keyboard inhibit Ground J10,J11 - Power Supply Connector Assignment POWERGOOD +5 Vdc +12 Vdc -12 Vdc Ground Ground Assignment Ground Ground -5 Vdc +5 Vdc +5 Vdc...
  • Page 24 CONFIGURING THE SYSTEM _________________________________________________________________________ +5 Vdc...
  • Page 25 CONFIGURING THE SYSTEM _________________________________________________________________________ J9 - External Battery Connector Assignment + Vdc not used Ground Ground JP26 - Cooling Fan Connector Assignment + 5Vdc Ground J1 - Keyboard Connector Assignment Keyboard clock Keyboard data Spare Ground +5 Vdc...
  • Page 26 CONFIGURING THE SYSTEM _________________________________________________________________________ THIS PAGE IS INTENTIONALLY LEFT BLANK...

  • Page 27: Technical Information

    Chapter 4 Technical Information ____________________________________________________ This section provides technical information about BISON II and is intended for advanced users interested in the basic design and operation of BISON II. MEMORY MAPPING Address Range Function 000000- 000K-512K System Board Memory 7FFFFF...

  • Page 28: I/O Address Map

    I/O ADDRESS MAP I/O Address Map on System Board I/O address hex 000 to 0FF are reserved for the system board I/O. ADDRESS DEVICE (HEX) 000-01F DMA Controller 1, 8237 020-03F Interrupt Controller 1, 8259, Master 040-05F Timer, 8254 060-06F Keyboard Controller 070-07F Real Time Clock, NMI...
  • Page 29 TECHNICAL INFORMATION _________________________________________________________________________ I/O address hex 100 to 3FF are available on the I/O channel. ADDRESS DEVICE (HEX) 1F0-1F8 Fixed Disk 200-207 Game I/O 278-27F Parallel Printer Port 2 2F8-2FF Serial Port 2 300-31F Prototype Card 360-36F Reserved 378-37F Parallel Printer Port 1 380-38F SDLC, bisynchronous 2 3A0-3AF...

  • Page 30: System Timers

    TECHNICAL INFORMATION _________________________________________________________________________ SYSTEM TIMERS BISON II has three programmable timer/counters controlled by Headland chipset and they are defined as channels 0 through 2: Channel 0 System Timer Gate 0 Tied on Clk in 0 1.190 Mhz OSC Clk out 0...
  • Page 31 TECHNICAL INFORMATION _________________________________________________________________________ Channel 2 Tone Generation of Speaker Gate 2 Controlled by bit 0 of port hex 61 PPI bit Clk in 2 1.190 Mhz OSC Clk out 2 Used to drive the speaker Note : Channel 1 is programmed to generate a 15-micro-second period signal.

  • Page 32: System Interrupts

    TECHNICAL INFORMATION _________________________________________________________________________ SYSTEM INTERRUPTS Sixteen levels of system interrupts are provided on BISON II. The following shows the interrupt-level assignments in decreasing priority. Level Function Microprocessor NMI Parity or I/O Channel Check Interrupt Controllers CTLR 1 CTLR 2 IRQ0...
  • Page 33 TECHNICAL INFORMATION _________________________________________________________________________ │ │ ╞══════════════════════════════════════╡ │ │ │ │ ╞══════════════════════════════════════╡ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ─┐ │ │ │ ┌─ │ │ │ │ │ │ │ │ │ │...

  • Page 34: Direct Memory Access (Dma)

    TECHNICAL INFORMATION _________________________________________________________________________ DIRECT MEMORY ACCESS (DMA) BISON II supports seven DMA channels. Channel Function Spare (8 bit transfer) SDLC (8 bit transfer) Floppy Disk (8 bit transfer) Spare (8 bit transfer) Cascade for DMA Controller 1 Spare (16 bit transfer)

  • Page 35: Real Time Clock And Cmos Ram

    TECHNICAL INFORMATION _________________________________________________________________________ The following shows the addresses for the page register. Page Register I/O Address (HEX) DMA Channel 0 0087 DMA Channel 1 0083 DMA Channel 2 0081 DMA Channel 3 0082 DMA Channel 5 008B DMA Channel 6 0089 DMA Channel 7 008A...

  • Page 36: Cmos Ram Address Map

    TECHNICAL INFORMATION _________________________________________________________________________ CMOS RAM ADDRESS MAP Addresses Description 00-0D * Real-time clock information * Diagnostic status byte * Shutdown status byte Diskette drive type byte - drives A and B Reserved Fixed disk type byte - drives C and D Reserved Equipment byte Low base memory byte...

  • Page 37: Real Time Clock Information

    TECHNICAL INFORMATION _________________________________________________________________________ REAL TIME CLOCK INFORMATION The following table describes real-time clock bytes and specifies their addresses. Byte Function Address Seconds Second alarm Minutes Minute alarm Hours Hour alarm Day of week Date of month Month Year Status Register A Status Register B Status Register C Status Register D...

  • Page 38: System Expansion Bus

    TECHNICAL INFORMATION _________________________________________________________________________ SYSTEM EXPANSION BUS BISON II provides six 16-bit slots and two VL-bus slots. The I/O channel supports: I/O address space from hex 100 to hex 3FF Selection of data access (either 8 or 16 bit) 24 bit memory addresses (16MB)
  • Page 39 TECHNICAL INFORMATION _________________________________________________________________________ The following figure shows the pin numbering for I/O channel connectors (A-side and B-side).
  • Page 40 TECHNICAL INFORMATION _________________________________________________________________________ The following figure shows the pin numbering for I/O channel connectors (C-side and D-side).
  • Page 41 TECHNICAL INFORMATION _________________________________________________________________________ The following tables summarize pin assignments for the I/O channel connectors. I/O Channel (A-Side) I/O Pin Signal Name -I/O CH CK -I/O CH RDY SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10...
  • Page 42 TECHNICAL INFORMATION _________________________________________________________________________...
  • Page 43 TECHNICAL INFORMATION _________________________________________________________________________ I/O Channel (B-Side) I/O Pin Signal Name Ground RESET DRV +5 Vdc Power IRQ9 -5 Vdc Power DRQ2 -12 Vdc Power +12 Vdc Power Ground -SMEMW -SMEMR -IOW -IOR -DACK3 DRQ3 -DACK1 DRQ1 -Refresh IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 -DACK2...
  • Page 44 TECHNICAL INFORMATION _________________________________________________________________________ +5 Vdc Power Ground...
  • Page 45 TECHNICAL INFORMATION _________________________________________________________________________ I/O Channel (C-Side) I/O Pin Signal Name SBHE LA23 LA22 LA21 LA20 LA19 LA18 LA17 -MEMR -MEMW SD10 SD11 SD12 SD13 SD14 SD15...
  • Page 46 TECHNICAL INFORMATION _________________________________________________________________________ I/O Channel (D-Side) I/O Pin Signal Name -MEM CS16 -I/O CS16 IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 -DACK0 DRQ0 -DACK5 DRQ5 -DACK6 DRQ6 -DACK7 DRQ7 +5 Vdc Power -MASTER Ground...
  • Page 47 TECHNICAL INFORMATION _________________________________________________________________________ The following table summery pin assignments for VESA VL-bus connector. VL-bus (side A) I/O Pin Signal Name GROUND CD11 CD13 CD15 GROUND CD17 POWER CD19 CD21 CD23 CD25 GROUND CD27 CD29 CD31 CA30 CA28 CD26 GROUND...
  • Page 48 TECHNICAL INFORMATION _________________________________________________________________________ CA24 CA22 POWER CA20...
  • Page 49 TECHNICAL INFORMATION _________________________________________________________________________ VL-bus (side A) I/O Pin Signal Name CA18 CA16 CA14 CA12 CA10 GROUND WBACK- BEO- POWER BE1- BE2- GROUND BE3- ADS- LRDY- LDEV- LREQ- GROUND LGNT- POWER LKEN- LEADS-...
  • Page 50 TECHNICAL INFORMATION _________________________________________________________________________ VL-bus (side B) I/O Pin Signal Name GROUND CD10 CD12 POWER CD14 CD16 CD18 CD20 GROUND CD22 CD24 CD26 CD28 CD30 POWER CA31 GROUND CA29 CA27 CA25 CA23 CA21 CA19...
  • Page 51 TECHNICAL INFORMATION _________________________________________________________________________ VL-bus (side B) I/O Pin Signal Name GROUND CA17 CA15 POWER CA13 CA11 GROUND RESET- D/C- M/IO- W/R- RDY- GROUND IRQ9 BRDY- BLAST- GROUND VLCLK POWER LBS16-...
  • Page 52 TECHNICAL INFORMATION _________________________________________________________________________...
  • Page 53 TECHNICAL INFORMATION _________________________________________________________________________ THIS PAGE IS INTENTIONALLY LEFT BLANK...

  • Page 54: Appendix A Operation And Maintenance

    Appendix A Operation and Maintenance ____________________________________________________ STATIC ELECTRICITY When installing or removing any add-on card, DRAM module or processor, you should discharge the static electricity on your body. Static electricity is dangerous to electronic device and can build-up on your body. When you touch the add-on card or motherboard, it is likely to damage the device.

  • Page 55: Cleaning The "Golden Finger

    install another fan inside the case. Using a larger case is recommended if there are a number of add- on cards and disk drives in the system. CLEANING THE "GOLDEN FINGER" Whenever inserting an add-on card to the motherboard, make sure that there is no dirt on the "golden finger"...

  • Page 56: Appendix B Troubleshooting

    Appendix B Troubleshooting ____________________________________________________ MAIN MEMORY ERROR After power up, the monitor remains blank, and there are beep sounds indicating a main memory failure. In this case, turn off the power and remove all SIMM modules. Carefully place the modules back to the sockets and make sure that all the modules are locked by the locking latches firmly.
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