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Octek HIPPO PRO 486 Manual

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HIPPO PRO
486

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Summary of Contents for Octek HIPPO PRO 486

  • Page 1 HIPPO PRO...
  • Page 2 The material in this manual is for information only and is subject to change without notice. REVISION: 1.3 IBM, IBM PC/XT/AT, PC-DOS, MS-DOS, OS/2, INTEL, AMI ARE THE TRADEMARKS OR REGISTERED TRADEMARKS OF THEIR RESPECTIVE OWNERS.
  • Page 3 RADIO FREQUENCY INTERFERENCE STATEMENT This equipment generates and uses radio frequency energy and if not installed and used properly, that is, in strict accordance with the manufacturer's instructions, may cause interference with radio and television reception. If this equipment does cause interference to radio or TV reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one...
  • Page 4 Note Electronic components are sensitive to dust and dirt. Do inspect and clean the computer system regularly. Turn off the power whenever you install or remove any connector, memory module and add-on card. Before turning on the power, make sure that all the connectors, memory modules and add-on cards are secured.
  • Page 5 1 contains a brief introduction and specification of OCTEK HIPPO PRO motherboard. In the Chapter 2, the functions of OCTEK HIPPO PRO are explained. It also outlines many advanced features of the CPU and the system architecture. Chapter 3 explains the installation of coprocessor, DRAM modules and jumpers.

  • Page 6: Table Of Contents

    Table of Content INTRODUCTION Chapter 1 GENERAL FEATURES Chapter 2 Specification 2-1 Processor Dynamic Cache Accelerator (DCA) VL-IDE (VESA) 2-10 Memory System 2-11 Write Buffering with Byte Gathering 2-13 8042 Emulation 2-14 Energy Saving 2-15 CONFIGURING THE SYSTEM Chapter 3 Installing processor3-1 Installing RAM Modules Configuration of Memory 3-4...
  • Page 7 TECHNICAL INFORMATION Chapter 4 Memory Mapping I/O Address Map System Timers System Interrupts 4-6 Direct Memory Access (DMA) Real Time Clock and CMOS RAM 4-8 CMOS RAM Address Map 4-9 Real Time Clock Information 4-10 System Expansion Bus 4-11 Appendix A OPERATION AND MAINTENANCE Static Electricity Keeping The System Cool A-1 Cleaning The `Golden Finger'...
  • Page 8 Chapter 1 Introduction ____________________________________________________ OCTEK HIPPO VL PRO is designed to be a powerful platform for sophisticated software available now and in the future. It contains the most powerful microprocessor 80486 which combines CPU, numeric coprocessor and internal cache memory on a single chip. OCTEK HIPPO VL...
  • Page 9 THE PAGE IS INTENTIONALLY LEFT BLANK...

  • Page 10: Chapter 2 General Features

    Chapter 2 General Features ____________________________________________________ SPECIFICATION Processor : 486 SX/DX 25/33MHz 486 DX/2 50/66MHz Overdrive Processor Optional I/O Slot : Compatible to standard AT bus Six 16-bit slots Three VESA VL-BUS slots ( 2 Master & 1 Slave) Power Saving Feature : CPU clock step down hardware BIOS support of VESA DPMS Cache :...
  • Page 11 GENERAL FEATURES ________________________________________________________________ Memory : 4 level deep write buffer with byte gathering Shadow RAM for system and video BIOS Page mode and hidden refresh Flexible configuration SIMM sockets for 256KB, 1MB or 4MB modules 128M Byte on board RAM Maxcimum System Support Functions : 8-Channel DMA (Direct Memory Access) 16-level interrupt...
  • Page 12 GENERAL FEATURES ________________________________________________________________ Other Features : On board POWERGOOD generation External battery connector...

  • Page 13: Processor

    GENERAL FEATURES ________________________________________________________________ PROCESSOR The power of OCEAN HIPPO PRO comes from 80486. It is the state-of-art microprocessor which merges many innovative features on a single chip for advanced applications and operation systems. With such high density, this CPU incorporates as many as new features to make itself the most powerful microprocessor.
  • Page 14 GENERAL FEATURES ________________________________________________________________...
  • Page 15 GENERAL FEATURES ________________________________________________________________ The cache memory is a 8K bytes, 16 bytes line size, four-way set associative configuration. The hit rate of this configuration is much better than 32K bytes two-way set associative external cache because a four-way set associative architecture provides better performance in a multitasking and multi-processor environment.
  • Page 16 GENERAL FEATURES ________________________________________________________________ By eliminating the access to external bus, operations with the internal cache can be completed in a single cycle. 80386 at least needs two cycles for an operation. To further increase the rate of data transfer inside the CPU, the internal bus of the cache memory is increased to 128 bits, which is four times of the external bus.
  • Page 17 GENERAL FEATURES ________________________________________________________________ Internal memory management unit provides a flexible addressing scheme for the next generation operation system. Multitasking, concurrent operation and manipulating huge data base can be accomplished with excellent performance. Paging mechanism is employed to allow powerful operating system to implement virtual memory.
  • Page 18 GENERAL FEATURES ________________________________________________________________ DYNAMIC CACHE ARCHITECTURE (DCA) DCA (dynamic Cache Architecture) is a new Cache Memory DCA literally boosts the cache memory efficiency by as much as 300 percent over conventional external cache! It is integrated as part of the high speed logic of the motherboard. A 486 system, until now, moves information in the same manner because the software written to take full advantage of the 486's 32 bit wide BUS...

  • Page 19: Vl-Ide (Vesa)

    GENERAL FEATURES ________________________________________________________________ VL-IDE (VESA) The VL-IDE interfaces between standard IDE drivers and the VL-Bus. Since the bus data transfer rate is much higher than what IDE drives can support, the drives will dictate the total throughput of the disk subsystem. The user has three speeds to select from normal speed, medium speed and high speed.

  • Page 20: Memory System

    GENERAL FEATURES ________________________________________________________________ MEMORY SYSTEM Two banks of DRAMs can be installed on board. So 8 SIMM modules may be installed on your system and the maximum memory size is up to 32MB, 256KB, 1MB and 4MB DRAM SIMM modules are supported.
  • Page 21 CPU operation because it has to access the main memory. In a high speed system like OCTEK HIPPO PRO, the CPU indeed can process a large amount of operations in the memory refresh period.

  • Page 22: Write Buffering With Byte Gathering

    The write policy of the OCTEK HIPPO PRO cache controller is 4-level write-buffering which provided the O wait state write during multiple write cycle.

  • Page 23: 8042 Emulation

    BIOS is needed to be modified to take advantage of it. An application without modification may cause problem. In OCTEK HIPPO PRO, there are some logic designs in the chipset to emulate the keyboard controller. An application can work in the usual way...

  • Page 24: Energy Saving

    PCs is to reduce electrical operating cost over the lifetime of the system. OCTEK HIPPO PRO brings to life the new technology of a low power consumption PC. HIPPO PRO GREEN STAR is designed to comply with the...
  • Page 25 GENERAL FEATURES ________________________________________________________________ THE PAGE IS INTENTIONALLY LEFT BLANK...

  • Page 26: Configuring The System

    Chapter 3 Configuring The System ____________________________________________________ Important Note : Turn off the power before installing or replacing any component. INSTALLING PROCESSOR Processor 486DX/P24T overdrive is a PGA devices. There is a 238-pin PGA socket. To install processor, be sure to line up pin 1 of the CPU with pin 1 of the socket as shown below.
  • Page 27 CONFIGURING THE SYSTEM ________________________________________________________________ Before installing the processor, make sure that all the pins are straight. The pins are very fragile. Once these pins are bent, the processor may be damaged. The Processor P24T or 486DX is automatically detected by the system. It need not to set any jumper.

  • Page 28: Installing Ram Modules

    Important Note : Turn off the power before installing or replacing any component. INSTALLING RAM MODULES OCTEK HIPPO PRO has eight sockets on board for SIMM modules. Whenever you add memory to the motherboard, install four modules at the same time. Also make sure that the chips on the modules face towards the slot for memory expansion board.

  • Page 29: Configuration Of Memory

    CONFIGURING THE SYSTEM ________________________________________________________________ If the BIOS reports an memory error or parity error, drag out the modules and insert them again. If the locking latches are damaged, contact your dealer to replace the socket. CONFIGURATION OF MEMORY The configuration of the memory is very flexible.

  • Page 30: Dram Configuration

    CONFIGURING THE SYSTEM ________________________________________________________________ Because of the shadow RAM function, the 384KB memory between 640KB to 1MB can not accessed. So, the memory size found by the system BIOS is not equal to the actual memory size. For example, when there is 4MB on board, the BIOS will show 3712KB.

  • Page 31: Control Of System Speed

    CONFIGURING THE SYSTEM ________________________________________________________________ CONTROL OF SYSTEM SPEED System speed can be controlled by keyboard and turbo switch. To change the speed by keyboard, use `-' and `+' of the numeric keypad. Press `Ctrl' `Alt' and `-' for slow speed and press `Ctrl' `Alt' and `+' for fast speed.

  • Page 32: System Board Jumper Setting

    CONFIGURING THE SYSTEM ________________________________________________________________ SYSTEM BOARD JUMPER SETTING There are several options which allows user to select by hardware switches. Display Selection JP15 CGA, EGA, VGA Monochrome display * CPU Type 486DX\DX2 486SX 487SX JP17 1 - 2* 2 - 3 1 - 2 JP18 2 - 3*...
  • Page 33 CONFIGURING THE SYSTEM ________________________________________________________________ IDE Selection Enable Disable 2 - 3* 1 - 2 JP36 1 - 2* 2 - 3 IDE access time Mode JP10 JP12 Cycle Access time (ns) time (ns) 1 - 2 1 - 2 2 - 3 1 - 2 1 - 2 2 - 3...
  • Page 34 CONFIGURING THE SYSTEM ________________________________________________________________ IRQ 5 IRQ 7 JP22 1 - 2 2 - 3* Floppy disk drive (2.88M) install none JP23,JP24,JP25 1 - 2* 2 - 3 Serial port 1 COM 1 Disable JP29 1 - 2* 2 - 3 JP30 1 - 2* 2 - 3...
  • Page 35 CONFIGURING THE SYSTEM ________________________________________________________________ Floppy disk controller Enable Disable JP33 1 - 2* 2 - 3...

  • Page 36: System Board Connectors

    CONFIGURING THE SYSTEM ________________________________________________________________ SYSTEM BOARD CONNECTORS Under typical conditions, these connectors should be connected to the indicators and switches of the system unit. The functions of connectors on the motherboard are listed below. Description Turbo switch Speaker connector Hardware reset connector Power LED &...
  • Page 37 CONFIGURING THE SYSTEM ________________________________________________________________ Pin assignment of the connector are illustrated as follows: P2 - Turbo Switch Connector Assignment Selection Pin Ground P4 - Speaker Connector Assignment Data out +5 Vdc Ground +5 Vdc P1 - Hardware Reset Connector Assignment Selection Pin Ground...
  • Page 38 CONFIGURING THE SYSTEM ________________________________________________________________ P5 - Power LED & Ext-Lock Connector Assignment +5 Vdc Ground Keyboard inhibit Ground P3 - Turbo LED Connector Assignment +5Vdc LED signal...
  • Page 39 CONFIGURING THE SYSTEM ________________________________________________________________ P13,P14 - Power Supply Connector Assignment POWERGOOD +5 Vdc +12 Vdc -12 Vdc Ground Ground Assignment Ground Ground -5 Vdc +5 Vdc +5 Vdc +5 Vdc...
  • Page 40 CONFIGURING THE SYSTEM ________________________________________________________________ P16 - External Battery Connector Assignment + Vdc not used Ground Ground P6 - Cooling Fan Connector Assignment + 5Vdc Ground KB1 - Keyboard Connector Assignment Keyboard clock Keyboard data Spare Ground +5 Vdc...
  • Page 41 CONFIGURING THE SYSTEM ________________________________________________________________ PRINTER PORT CONNECTOR Function Function -STROBE -AUTO FEED DATA 0 -ERROR DATA 1 -INIT DATA 2 SLCT IN DATA 3 GROUND DATA 4 GROUND DATA 5 GROUND DATA 6 GROUND DATA 7 GROUND -PACK GROUND BUSY GROUND PAPER END GROUND...
  • Page 42 CONFIGURING THE SYSTEM ________________________________________________________________ HARD DISK CONNECTOR Function Function -Host Reset Ground Host Date 7 Host Data 8 Host Date 6 Host Data 9 Host Data 5 Host Data 10 Host Data 4 Host Data 11 Host Data 3 Host Data 12 Host Data 2 Host Data 13 Host Data 1...
  • Page 43 CONFIGURING THE SYSTEM ________________________________________________________________ FLOPPY DISKETTE CONNECTOR Function Function Ground -Reduced Write Unused Unused Unused Ground -Index Ground -Motor Enable 1 Ground -Drive Select 0 Ground -Drive Select 1 Ground -Motor Enable 0 Ground -Direction Ground -Step Ground -Write Date Ground -Write Enable Ground...
  • Page 44 CONFIGURING THE SYSTEM ________________________________________________________________ P11,P12 SERIAL PORT INTERFACE Function I/O Pin Function Carrier Detect Receive Data Transmit Data Data Terminal Ready Ground Data Send Ready Request To Send Clear To Send Ring Indicator Unused GAME PORT INTERFACE Function Function Button 0 Position 0 Position 1 Button 1...
  • Page 45 CONFIGURING THE SYSTEM ________________________________________________________________ THIS PAGE IS INTENTIONALLY LEFT BLANK...

  • Page 46: Technical Information

    Chapter 4 Technical Information ____________________________________________________ This section provides technical information about OCTEK HIPPO PRO and is intended for advanced users interested in the basic design and operation of OCTEK HIPPO PRO. MEMORY MAPPING Address Range Function 000000- 000K-512K System Board Memory 7FFFFF...

  • Page 47: I/O Address Map

    TECHNICAL INFORMATION ________________________________________________________________ I/O ADDRESS MAP I/O Address Map on System Board I/O address hex 000 to 0FF are reserved for the system board I/O. ADDRESS DEVICE (HEX) 000-01F DMA Controller 1, 8237 020-03F Interrupt Controller 1, 8259, Master 040-05F Timer, 8254 060-06F Keyboard Controller...
  • Page 48 TECHNICAL INFORMATION ________________________________________________________________ I/O address hex 100 to 3FF are available on the I/O channel. ADDRESS DEVICE (HEX) 1F0-1F8 Fixed Disk 200-207 Game I/O 278-27F Parallel Printer Port 2 2F8-2FF Serial Port 2 300-31F Prototype Card 360-36F Reserved 378-37F Parallel Printer Port 1 380-38F SDLC, bisynchronous 2 3A0-3AF...

  • Page 49: System Timers

    TECHNICAL INFORMATION ________________________________________________________________ SYSTEM TIMERS OCTEK HIPPO PRO has three programmable timer/counters controlled by Headland chipset and they are defined as channels 0 through 2: Channel 0 System Timer Gate 0 Tied on Clk in 0 1.190 Mhz OSC Clk out 0...
  • Page 50 TECHNICAL INFORMATION ________________________________________________________________ Channel 2 Tone Generation of Speaker Gate 2 Controlled by bit 0 of port hex 61 PPI bit Clk in 2 1.190 Mhz OSC Clk out 2 Used to drive the speaker Note : Channel 1 is programmed to generate a 15-micro- second period signal.

  • Page 51: System Interrupts

    TECHNICAL INFORMATION ________________________________________________________________ SYSTEM INTERRUPTS Sixteen levels of system interrupts are provided on OCTEK HIPPO PRO. The following shows the interrupt-level assignments in decreasing priority. Level Function Microprocessor NMI Parity or I/O Channel Check Interrupt Controllers CTLR 1 CTLR 2 IRQ0...
  • Page 52 TECHNICAL INFORMATION ________________________________________________________________ ┌──────────────────────────────────────┐ │ │ ╞══════════════════════════════════════╡ │ │ │ │ ╞══════════════════════════════════════╡ │ │ │ │ │ │ │ │ │ │ │ │ │ │ │ ─┐ │ │ │ ┌─ │ │ │ │ │ │ │ │ │...

  • Page 53: Direct Memory Access (Dma)

    TECHNICAL INFORMATION ________________________________________________________________ DIRECT MEMORY ACCESS (DMA) OCTEK HIPPO PRO supports seven DMA channels. Channel Function Spare (8 bit transfer) SDLC (8 bit transfer) Floppy Disk (8 bit transfer) Spare (8 bit transfer) Cascade for DMA Controller 1 Spare (16 bit transfer)

  • Page 54: Real Time Clock And Cmos Ram

    TECHNICAL INFORMATION ________________________________________________________________ The following shows the addresses for the page register. Page Register I/O Address (HEX) DMA Channel 0 0087 DMA Channel 1 0083 DMA Channel 2 0081 DMA Channel 3 0082 DMA Channel 5 008B DMA Channel 6 0089 DMA Channel 7 008A...

  • Page 55: Cmos Ram Address Map

    TECHNICAL INFORMATION ________________________________________________________________ CMOS RAM ADDRESS MAP Addresses Description 00-0D * Real-time clock information * Diagnostic status byte * Shutdown status byte Diskette drive type byte - drives A and B Reserved Fixed disk type byte - drives C and D Reserved Equipment byte Low base memory byte...

  • Page 56: Real Time Clock Information

    TECHNICAL INFORMATION ________________________________________________________________ REAL TIME CLOCK INFORMATION The following table describes real-time clock bytes and specifies their addresses. Byte Function Address Seconds Second alarm Minutes Minute alarm Hours Hour alarm Day of week Date of month Month Year Status Register A Status Register B Status Register C Status Register D...

  • Page 57: System Expansion Bus

    TECHNICAL INFORMATION ________________________________________________________________ SYSTEM EXPANSION BUS OCTEK HIPPO PRO provides six 16-bit slots and three VL-bus slots. The I/O channel supports: I/O address space from hex 100 to hex 3FF Selection of data access (either 8 or 16 bit) 24 bit memory addresses (16MB)
  • Page 58 TECHNICAL INFORMATION ________________________________________________________________ The following figure shows the pin numbering for I/O channel connectors (A-side and B-side).
  • Page 59 TECHNICAL INFORMATION ________________________________________________________________ The following figure shows the pin numbering for I/O channel connectors (C-side and D-side).
  • Page 60 TECHNICAL INFORMATION ________________________________________________________________ The following tables summarize pin assignments for the I/O channel connectors. I/O Channel (A-Side) I/O Pin Signal Name -I/O CH CK -I/O CH RDY SA19 SA18 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10...
  • Page 61 TECHNICAL INFORMATION ________________________________________________________________...
  • Page 62 TECHNICAL INFORMATION ________________________________________________________________ I/O Channel (B-Side) I/O Pin Signal Name Ground RESET DRV +5 Vdc Power IRQ9 -5 Vdc Power DRQ2 -12 Vdc Power +12 Vdc Power Ground -SMEMW -SMEMR -IOW -IOR -DACK3 DRQ3 -DACK1 DRQ1 -Refresh IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 -DACK2...
  • Page 63 TECHNICAL INFORMATION ________________________________________________________________ BALE +5 Vdc Power Ground...
  • Page 64 TECHNICAL INFORMATION ________________________________________________________________ I/O Channel (C-Side) I/O Pin Signal Name SBHE LA23 LA22 LA21 LA20 LA19 LA18 LA17 -MEMR -MEMW SD10 SD11 SD12 SD13 SD14 SD15...
  • Page 65 TECHNICAL INFORMATION ________________________________________________________________ I/O Channel (D-Side) I/O Pin Signal Name -MEM CS16 -I/O CS16 IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 -DACK0 DRQ0 -DACK5 DRQ5 -DACK6 DRQ6 -DACK7 DRQ7 +5 Vdc Power -MASTER Ground...
  • Page 66 TECHNICAL INFORMATION ________________________________________________________________ The following table summery pin assignments for VESA VL-bus connector. VL-bus (side A) I/O Pin Signal Name GROUND CD11 CD13 CD15 GROUND CD17 POWER CD19 CD21 CD23 CD25 GROUND CD27 CD29 CD31 CA30 CA28 CD26 GROUND...
  • Page 67 TECHNICAL INFORMATION ________________________________________________________________ CA24 CA22 POWER CA20...
  • Page 68 TECHNICAL INFORMATION ________________________________________________________________ VL-bus (side A) I/O Pin Signal Name CA18 CA16 CA14 CA12 CA10 GROUND WBACK- BEO- POWER BE1- BE2- GROUND BE3- ADS- LRDY- LDEV- LREQ- GROUND LGNT- POWER LKEN-...
  • Page 69 TECHNICAL INFORMATION ________________________________________________________________ LEADS-...
  • Page 70 TECHNICAL INFORMATION ________________________________________________________________ VL-bus (side B) I/O Pin Signal Name GROUND CD10 CD12 POWER CD14 CD16 CD18 CD20 GROUND CD22 CD24 CD26 CD28 CD30 POWER CA31 GROUND CA29 CA27 CA25 CA23 CA21...
  • Page 71 TECHNICAL INFORMATION ________________________________________________________________ CA19...
  • Page 72 TECHNICAL INFORMATION ________________________________________________________________ VL-bus (side B) I/O Pin Signal Name GROUND CA17 CA15 POWER CA13 CA11 GROUND RESET- D/C- M/IO- W/R- RDY- GROUND IRQ9 BRDY- BLAST- GROUND VLCLK POWER...
  • Page 73 TECHNICAL INFORMATION ________________________________________________________________ LBS16-...
  • Page 74 TECHNICAL INFORMATION ________________________________________________________________ THIS PAGE IS INTENTIONALLY LEFT BLANK...

  • Page 75: Appendix A Operation And Maintenance

    Appendix A Operation and Maintenance ____________________________________________________ STATIC ELECTRICITY When installing or removing any add-on card, DRAM module or coprocessor, you should discharge the static electricity on your body. Static electricity is dangerous to electronic device and can build-up on your body. When you touch the add-on card or motherboard, it is likely to damage the device.
  • Page 76 on cards and disk drives in the system.

  • Page 77: Cleaning The `Golden Finger

    CLEANING THE "GOLDEN FINGER" Whenever inserting an add-on card to the motherboard, make sure that there is no dirt on the "golden finger" of the add-on card. If not, the contact between the "golden finger" and the slot may be poor and thus the add-on card may not work properly.

  • Page 78: Appendix B Troubleshooting

    Appendix B Troubleshooting ____________________________________________________ MAIN MEMORY ERROR After power up, the monitor remains blank, and there are beep sounds indicating a main memory failure. In this case, turn off the power and remove all SIMM modules. Carefully place the modules back to the sockets and make sure that all the modules are locked by the locking latches firmly.
  • Page 79 THIS PAGE IS INTENTIONALLY LEFT BLANK...

  • Page 80: Summery Of Jumper Setting

    Appendix C SUMMERY OF JUMPER SETTING ____________________________________________________ Display Selection JP15 CGA, EGA, VGA Monochrome display * CPU Type 486DX\DX2 486SX 487SX JP17 1 - 2* 2 - 3 1 - 2 JP18 2 - 3* 1 - 2 JP19 2 - 3* 1 - 2 2 - 3 System Speed...
  • Page 81 JP36 1 - 2* 2 - 3...
  • Page 82 JUMPER SETTING _________________________________________________________________________ IDE access time Mode JP10 JP12 Cycle Access time (ns) time (ns) 1 - 2 1 - 2 2 - 3 1 - 2 1 - 2 2 - 3 2 - 3 2 - 3 Game Port Enable Disable JP21...
  • Page 83 JUMPER SETTING _________________________________________________________________________ COM 1 Disable JP29 1 - 2* 2 - 3 JP30 1 - 2* 2 - 3 Serial port 2 COM 2 Disable JP31 1 - 2* 2 - 3 JP32 1 - 2* 2 - 3 Floppy disk controller Enable Disable...
  • Page 84 JUMPER SETTING ________________________________________________________________ THIS PAGE IS INTENTIONALLY LEFT BLANK...
  • Page 85 Appendix D System Board Layout ____________________________________________________ THIS PAGE IS INTENTIONALLY LEFT BLANK...

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