Programming The Board Capability Rom; Rom Command Register Bit Map; Rom Control Register Bit Map - PEP CP381 Manual

30 channel compactpci digital input controller
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CP381
4.3.9

Programming the Board Capability ROM

The Board Capability ROM contains all the board data necessary to identify board, version, op-
tional features, etc., and to setup the basic software. The BCR is implemented using a 4 KBit
serial EEPROM of the type Microchip 93LC66.
(The contents list of the BCR is not described here.)
The serial interface of the device has been realized in hardware resulting in a very simple reg-
ister based programming interface with command, control, status and data registers. All proto-
col and serial timing specifications are resolved by hardware.
Programming of the BCR is undertaken as follows: The control word is written into the ROM
Control Register including command opcode and internal address. Then optional data (in case
of Write action) is written into the ROM Data Register. Command execution is started by setting
the Startbit in the ROM Command Register. Then Ready/Busy must be polled in the ROM Sta-
tus Register. After reaching Ready status, the next command can be set up and data (in case
of Read action) can be fetched from the ROM Data Register.
Table 4-17: ROM Command Register Bit Map
Bits
Type
31
r/w
30-0
r/w
Note...
The Startbit will be automatically reset as soon as an action is completed.
Table 4-18: ROM Control Register Bit Map
Bits
Type
31-18
r/w
17-16
r/w
15-9
r/w
8-0
r/w
Note...
The commands READ, EWEN (Write Enable) and WRITE are sufficient for all
purposes.
ID 24107, Rev. 01
Default
0
Startbit
00
Reserved
Default
0
Reserved
00
Opcode
00
Reserved
00
Internal address (A8..A0)
© 2002 PEP Modular Computers GmbH
Configuration
Function
Function
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