Ddr So-Dimm_0 - Intel W515PU Service Manual

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Schematic Diagrams

DDR SO-DIMM_0

SO-DIMM A
D
Sheet 9 of 31
3.3VS
DDR SO-DIMM_0
C
B
VTT_MEM
C173
10u_6.3V_X5R_06
1.35V
C350
+
*330uF_2.5V_12m_6.6*6.6*4.2
1.35V
C168
0.1u_16V_Y5V_04
A
1.35V
C343
0.1u_16V_Y5V_04
B - 10 DDR SO-DIMM_0
5
4
[2]
M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
Layout Note:
M_A_A8
M_A_A9
signal/space/signal:
M_A_A10
M_A_A11
8 / 4 / 8
M_A_A12
M_A_A13
M_A_A14
M_A_A15
[2]
M_A_BS0
[2]
M_A_BS1
[2]
M_A_BS2
[2]
M_A_CS#0
[2]
M_A_CS#1
[2]
M_A_CLK_DDR0
[2]
M_A_CLK_DDR#0
[2]
M_A_CLK_DDR1
3.3VS
[2]
M_A_CLK_DDR#1
[2]
M_A_CKE0
[2]
M_A_CKE1
[2]
M_A_CAS#
R241
R233
[2]
M_A_RAS#
*10K_04
*10K_04
[2]
M_A_WE#
SA0_DIM0
SA1_DIM0
SA0_DIM0
SA1_DIM0
[8]
SMB_CLK_DDR
[8]
SMB_DAT_DDR
[2]
M_A_ODT0
R238
R229
[2]
M_A_ODT1
10K_04
10K_04
[2]
M_A_DQS[7:0]
M_A_DQS1
M_A_DQS0
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
[2]
M_A_DQS#[7:0]
M_A_DQS#1
M_A_DQS#0
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
C171
C178
C181
C182
C184
10u_6.3V_X5R_06
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
C165
C166
C191
C193
C195
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
C169
C170
C167
C192
C194
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
C342
0.1u_16V_Y5V_04
5
4
3
JDIMM1A
M_A_DQ[63:0]
[2]
98
5
M_A_DQ14
A0
DQ0
97
7
M_A_DQ13
A1
DQ1
96
15
M_A_DQ10
A2
DQ2
95
17
M_A_DQ9
A3
DQ3
92
4
M_A_DQ11
A4
DQ4
91
6
M_A_DQ12
A5
DQ5
90
16
M_A_DQ8
A6
DQ6
86
18
M_A_DQ15
A7
DQ7
89
21
M_A_DQ5
A8
DQ8
85
23
M_A_DQ6
A9
DQ9
107
33
M_A_DQ4
A10/AP
DQ10
84
35
M_A_DQ7
A11
DQ11
83
22
M_A_DQ0
A12/BC#
DQ12
119
24
M_A_DQ1
A13
DQ13
80
34
M_A_DQ3
A14
DQ14
M_A_DQ2
78
36
A15
DQ15
39
M_A_DQ16
DQ16
109
41
M_A_DQ21
BA0
DQ17
108
51
M_A_DQ23
BA1
DQ18
79
53
M_A_DQ19
BA2
DQ19
114
40
M_A_DQ20
S0#
DQ20
121
42
M_A_DQ22
S1#
DQ21
101
50
M_A_DQ18
CK0
DQ22
103
52
M_A_DQ17
CK0#
DQ23
102
57
M_A_DQ24
CK1
DQ24
104
59
M_A_DQ26
CK1#
DQ25
73
67
M_A_DQ29
CKE0
DQ26
M_A_DQ30
74
69
CKE1
DQ27
115
56
M_A_DQ31
CAS#
DQ28
110
58
M_A_DQ25
RAS#
DQ29
113
68
M_A_DQ27
WE#
DQ30
197
70
M_A_DQ28
SA0
DQ31
201
129
M_A_DQ32
[2]
DRAM_A_RST#
SA1
DQ32
202
131
M_A_DQ36
SCL
DQ33
200
141
M_A_DQ39
SDA
DQ34
143
M_A_DQ34
DQ35
116
130
M_A_DQ37
ODT0
DQ36
120
132
M_A_DQ38
ODT1
DQ37
140
M_A_DQ33
DQ38
11
142
M_A_DQ35
DM0
DQ39
28
147
M_A_DQ46
DM1
DQ40
46
149
M_A_DQ44
DM2
DQ41
63
157
M_A_DQ42
DM3
DQ42
136
159
M_A_DQ47
DM4
DQ43
M_A_DQ40
153
146
DM5
DQ44
170
148
M_A_DQ45
DM6
DQ45
187
158
M_A_DQ41
DM7
DQ46
160
M_A_DQ43
DQ47
12
163
M_A_DQ54
DQS0
DQ48
29
165
M_A_DQ53
DQS1
DQ49
47
175
M_A_DQ50
DQS2
DQ50
64
177
M_A_DQ49
DQS3
DQ51
137
164
M_A_DQ52
DQS4
DQ52
154
166
M_A_DQ51
DQS5
DQ53
171
174
M_A_DQ55
DQS6
DQ54
188
176
M_A_DQ48
DQS7
DQ55
M_A_DQ62
181
DQ56
10
183
M_A_DQ61
DQS0#
DQ57
27
191
M_A_DQ63
DQS1#
DQ58
45
193
M_A_DQ57
DQS2#
DQ59
62
180
M_A_DQ56
DQS3#
DQ60
135
182
M_A_DQ60
DQS4#
DQ61
152
192
M_A_DQ59
CLOSE TO SO-DIMM_0
DQS5#
DQ62
169
194
M_A_DQ58
DQS6#
DQ63
186
DQS7#
R232
1.35V
91-93469-179
6-86-24204-029
CLOSE TO SO-DIMM_0
R249
C197
C163
C164
1.35V
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
C196
C198
0.1u_16V_Y5V_04
0.1u_16V_Y5V_04
3
2
1
JDIMM1B
1.35V
75
44
VDD1
VSS16
76
48
VDD2
VSS17
81
49
VDD3
VSS18
82
54
VDD4
VSS19
87
55
VDD5
VSS20
88
60
VDD6
VSS21
93
61
VDD7
VSS22
94
65
VDD8
VSS23
99
66
VDD9
VSS24
100
71
VDD10
VSS25
105
72
VDD11
VSS26
106
127
VDD12
VSS27
111
128
VDD13
VSS28
112
133
VDD14
VSS29
117
134
VDD15
VSS30
118
138
VDD16
VSS31
123
139
VDD17
VSS32
3.3VS
124
144
VDD18
VSS33
20mils
145
VSS34
199
150
VDDSPD
VSS35
151
C183
VSS36
77
155
NC1
VSS37
122
156
1u_6.3V_X5R_04
NC2
VSS38
125
161
NCTEST
VSS39
162
VSS40
R245
10K_04
198
167
3.3VS
EVENT#
VSS41
R247
1K_1%_04
R246
1K_1%_04
30
168
1.35V
RESET#
VSS42
172
VSS43
173
VSS44
MVREF_DQ
1
178
VREF_DQ
VSS45
MVREF_CA
126
179
VREF_CA
VSS46
184
VSS47
185
C176
C188
VSS48
2
189
VSS1
VSS49
3
190
1u_6.3V_X5R_04
1u_6.3V_X5R_04
VSS2
VSS50
8
195
VSS3
VSS51
9
196
VSS4
VSS52
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
203
VSS10
VTT1
31
204
VSS11
VTT2
32
VSS12
37
GND1
VSS13
G1
38
GND2
VSS14
G2
43
VSS15
91-93469-179
3.65K_1%_04
MVREF_DQ
R230
2_1%_04
R223
*0_04
M0_ODQVREF
C172
R231
C177
0.22uF_10V_X5R_04
3.65K_1%_04
*0.1u_10V_X5R_04
R227
24.9_1%_04
3.65K_1%_04
MVREF_CA
R258
2_1%_04
R262
*0_04
M0_OCAVREF
C201
R248
C199
0.22uF_10V_X5R_04
3.65K_1%_04
*0.1u_10V_X5R_04
R255
24.9_1%_04
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[8,11,12,13,14,15,17,18,19,20]
3.3VS
[09] DDR3 SO-DIMM_0
[09] DDR3 SO-DIMM_0
[09] DDR3 SO-DIMM_0
[6,23]
1.35V
[23]
VTT_MEM
Size
Size
Size
Document Number
Document Number
Document Number
6-71-W51P0-D03
6-71-W51P0-D03
6-71-W51P0-D03
Custom
Custom
Custom
SCHEMATIC1
SCHEMATIC1
SCHEMATIC1
Date:
Date:
Date:
Friday, May 20, 2016
Friday, May 20, 2016
Friday, May 20, 2016
Sheet
Sheet
Sheet
2
1
D
C
VTT_MEM
[2]
B
[2]
A
Rev
Rev
Rev
3.0
3.0
3.0
9
9
9
of
of
of
32
32
32

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