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DESCRIPTION OF BLOCK DIAGRAM
1. Video Controller Part.
This part amplifies the level of video signal for the digital conversion and converts from the analog video signal to the
digital video signal using a pixel clock.
The pixel clock for each mode is generated by the PLL.
The range of the pixel clock is from 25.175MHz to 106.6MHz.
This part consists of the Scalar, ADC converter, TMDS receiver and LVDS transmitter.
The Scalar gets the video signal converted analog to digital, interpolates input to 1440 X 900 resolution signal and
outputs 8-bit R, G, B signal to transmitter.
2. Power Part.
This part consists of the one 3.3V, and one 1.2V regulators to convert power which is provided 5V in Power board.
12V is provided for inverter board, 5V is provided for LCD panel.
Also, 5V is converted 3.3V and 1.2V by regulator. Converted power is provided for IC in the main board.
The inverter operates back-light lamps of module.
3. MICOM Part.
This part is including video controller part. And this part consists of Reset IC and the Micom.
The Micom distinguishes polarity and frequencies of the H/V sync are supplied from signal cable.
The controlled data of each mode is stored in scalar.
Copyright © 2010 LG Electronics. Inc. All right reserved.
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LGE Internal Use Only
Only for training and service purposes
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