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Termination of the VPP and Mode Pin for
ACT1 Devices in a Radiation Environment
MODE Pin
There is a concern about the use of Actel RH1020 or RH1280 Field
Programmable Gate Arrays (FPGA) in a space-flight, radiation-
environment with the MODE and/or VPP pins left unterminated. The
effects of a floating VPP pin are difficult to assess. Testing indicates that
the VPP pin must be properly terminated for reliable operation of the
device.
The MODE pin is used to control both the state of the device (e.g.,
normal, programming, debug, outputs disabled, various test modes,
etc.) and the operation with regular logic levels. The device can be put
into various modes; when the MODE pin is in the logic one state,
commands can be shifted into the internal registers via DCLK (Data
Clock) and SDI (Serial Data In), and through proper sequencing. When
the MODE pin is in the logic zero state, all of the mode registers and
control path flip-flops are directly held in the inactive state,
guaranteeing that the device is in normal operating mode. Note that
there is no guarantee as to the states of these "configuration" registers
at power-up.
The effects of a floating MODE pin are difficult to predict because
almost anything can happen. For example, one state that the device
might go into is to support board level test. In this mode, all of the
device outputs are tristated. Other examples of possible modes include
programming mode and various device test modes. Incorrect
configuration can result in functional failures and/or high currents
which may either damage or pose a serious reliability hazard to the
hardware. The effects for damage to the device and the board must be
assessed on a specific basis.
Testing shows that when the MODE pin is tied high, it is easy to "latch-
up" the device with heavy ions. The devices repeatedly draw excessive
amounts of current. The probability of having a problem with an
unterminated MODE pin is quite high.
C
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