NEC mPD78C14 A Schematics page 27

Mnemonic Operand
B1
RLD 0 1 0 0 1 0 0 0
RRD
r2
RLL
r2
RLR
r2
SLL
r2
SLR
r2
SLLC
SLRC r2
DRLL
EA
EA
DRLR
EA
DSLL
DSLR EA
JMP word
0 1 0 1 0 1 0 0
*
JB 0 0 1 0 0 0 0 1
word 1 1 jdisp 1
JR
JRE word
0 1 0 0 1 1 1
*
JEA
0 1 0 0 1 0 0 0
word
CALL 0 1 0 0 0 0 0 0
*
CALB 0 1 0 0 1 0 0 0
CALF word
0 1 1 1 1
*
Instruction code
B3
B2
0 0 1 1 1 0 0 0
1 0 0 1
0 1 R R
1 0
0 0 R R
1 0
0 0 1 0 0 1 R R
1 0
0 0 R R
1 0
0 0 0 0 0 1 R R
1 0
0 0 R R
1 0
*
1 0 1 1 0 1 0 0
0 0 0 0
1 0 1 0 0 1 0 0
0 0 0 0
Low Adrs High Adrs
jdisp
0 0 1 0 1 0 0 0
Low Adrs High Adrs
0 0 1 0 1 0 0 1
fa
State
Operation
B4
Rotate Left Digit
17
17 Rotate Right Digit
← r2 ← CY, CY ← r2
8 r2 , r2
m+1 m 0
← r2 ← CY, CY ← r2
r2 , r2
8
m—1 m 7
← r2 ← 0, CY ← r2
r2 , r2
8
m+1 m 0
← r2 ← 0, CY ← r2
8 r2 , r2
m—1 m 7
← r2 ← 0, CY ← r2
r2 , r2
8
m+1 m 0
← r2 ← 0, CY ← r2
r2 , r2
8 m—1 m 7
← EA ← CY, CY ← EA
EA , EA
8
n+1 n 0
← EA ← CY, CY ← EA
EA , EA
8 n—1 n 15
← EA ← 0, CY ← EA
EA , EA
8
n+1 n 0
← EA ← 0, CY ← EA
EA , EA
8
n—1 n 15
PC ← word
10
← B, PC ← C
4 PC
H L
PC ← PC+1+jdisp 1
10
PC ← PC+2+jdisp
10
PC ← EA
8
(SP–1) ← (PC+3) , (SP–2) ← (PC+3)
H
16
PC ← word, SP ← SP–2
(SP–1) ← (PC+2)
, (SP–2)← (PC+2)
H
17
← B, PC ← C, SP ← SP–2
PC
H L
(SP–1) ← (PC+2) , (SP–2) ← (PC+2)
H
13
← 00001, PC ← fa, SP ← SP–2
PC
15–11 10–0
Skip
condition
7
0
7
0
Carry
7
Carry
0
15
0
15
0
L
L
L