JYTEK PXI-63982 User Manual
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JYTEK PXI-63982 User Manual

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PXI-63982
PXI Embedded Controller
User's Manual
Manual Rev.:
Revision Date:
Part No:
1.0
January 26, 2021
50-17058-1000

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Summary of Contents for JYTEK PXI-63982

  • Page 1 PXI-63982 PXI Embedded Controller User’s Manual Manual Rev.: Revision Date: January 26, 2021 Part No: 50-17058-1000...
  • Page 2 Revision History Revision Release Date Description of Change(s) 2021-01-26 Initial release Revision History...
  • Page 3 Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental protection is a top priority for JYTEK. We have enforced measures to ensure that our products, manufacturing processes, components, and raw materials have as little impact on the environment as possible.
  • Page 4 California Proposition 65 Warning WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Diox- ane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause...

  • Page 5: Table Of Contents

    Package Contents ............. 17 Operating System Installation ..........18 2.2.1 Installation Environment ........... 19 2.2.2 Installing the PXI-63982..........20 2.2.3 Replacing the Hard Drive or Solid State Drive ..22 2.2.4 Clearing CMOS ............24 3 Driver Installation ............. 25...
  • Page 6 A Appendix: PXI Trigger I/O Functions .......27 Data Types................. 27 Function Library ..............29 A.2.1 TRIG_Init ..............29 A.2.2 TRIG_Close .............. 30 A.2.3 TRIG_SetSoftTrg ............31 A.2.4 TRIG_Trigger_Route ..........32 A.2.5 TRIG_Trigger_Clear ..........34 A.2.6 TRIG_GetSoftTrg............35 A.2.7 TRIG_Trigger_Route_Query ........36 A.2.8 TRIG_GetDriverRevision ..........

  • Page 7: Revision History

    Revision History Revision Release Date Description of Change(s) 2021-01-26 Initial release Revision History...
  • Page 8 This page intentionally left blank. viii...

  • Page 9: Preface

    California Proposition 65 Warning WARNING: This product can expose you to chemicals including acrylamide, arsenic, benzene, cadmium, Tris(1,3-dichloro-2-propyl)phosphate (TDCPP), 1,4-Diox- ane, formaldehyde, lead, DEHP, styrene, DINP, BBP, PVC, and vinyl materials, which are known to the State of California to cause cancer, and acrylamide, benzene, cadmium, lead, mercury, phthalates, toluene, DEHP, DIDP, DnHP, DBP, BBP, PVC, and vinyl materials, which are known to the State of California to cause...

  • Page 10: List Of Figures

    This page intentionally left blank. List of Figures...

  • Page 11: List Of Tables

    PXI-63982 List of Tables Table 1-1: Front Panel Legend ............7 Table 1-2: DisplayPort Pin Assignment ..........9 Table 1-3: GPIB Pin Description ............. 10 Table 1-4: LED Indicator Legend ............ 11 Table 1-5: USB 2.0 Port Pin Assignment........12 Table 1-6: Ethernet Port Pin Assignments........
  • Page 12 This page intentionally left blank. List of Tables...

  • Page 13: Introduction

    Combining a state-of-the-art Intel® Core™ i7-6820EQ processor, and up to 32 GB of 2133 MHz DDR4 memory, the PXI-63982 utilizes four separate computing engines on a single processor, enabling execution of eight independent tasks simultaneously in a multitasking environment.

  • Page 14: Features

    1.1 Features PXI™-1 PXI Hardware Specification Rev. 2.3 complaint ® 6th Generation Intel Core™ i7-6820EQ processor for max- imum computing power, 3.5 GHz maximum in single-core, Turbo Boost mode Dual Channel DDR4 SO-DIMM Up to 32 GB 2133 MHz Maximum System Throughput 132 MB/s Preinstalled 256 GB or more SATA SSD Supports 2.5”...

  • Page 15: Specifications

    PXI-63982 1.2 Specifications Front Panel DDR4 2133/2400 MHz SODIMM 1 Connectors Memory Bus Mobile 6th Gen DDR4 2133/2400 MHz SODIMM 2 Intel® Core™ I7-6820EQ Processor DisplayPort DP/HDMI Dual Mode PCIe Gen3 x16 PCI Express to PCI Connector x1 Switch Intel FDI DMI 3.0...
  • Page 16 Video DisplayPort resolution up to 3840 x 2160 @ 60 Hz DVI (with passive DisplayPort-to-DVI adapter) resolution up to 1920 x 1200 @ 60 Hz DisplayPort adapters for other standards are available, with maximum available resolution dependent on the adapter NOTE: NOTE: Storage...
  • Page 17 PXI-63982 Weight 0.91 kg (exclusive of packaging) Do not remove the blue key from the PXI-63982 system connec- tor, only the 5V VIO PCI bus is compatible; the 3.3V VIO PCI bus is not. SEVERE system damage may result. WARNING:...
  • Page 18 FCC 47 CFR Part 15 Subpart A (Class A) ICES-001 Class A ICES-003 Issue 6-2016 AS/NZS CISPR 11: Group 1, Class A emissions AS/NZS CISPR 32: 2015 (Ed 2.0)/C1:2016: Class A The PXI-63982 meets the essential requirements of applicable European Directives. Power Requirements Typical Consumption DC +3.3V...

  • Page 19: I/O And Indicators

    PXI-63982 1.3 I/O and Indicators 1.3.1 Front Panel Figure 1-2: Front Panel GPIB Connector Reset Button (Micro D-Sub 25P) DisplayPort 2x Gigabit Ethernet PXI Trigger Connector 4x USB 3.0 (SMB jack) 2x Type-A USB 2.0 LED Indicators Table 1-1: Front Panel Legend...
  • Page 20 The PXI trigger connector is an SMB jack, used to route external trigger signals to or from the PXI backplane. Trigger signals are TTL-compatible and edge sensitive. The PXI-63982 provides four trigger routing modes from/to the PXI trigger connector to synchro-...

  • Page 21: Table 1-2: Displayport Pin Assignment

    PXI-63982 DisplayPort Connectors Provide monitor connection with installation of requisite adapters required if connecting to VGA/DVI/HDMI monitors. Dual display function is also supported. Figure 1-4: DisplayPort Connector Signal Signal CN_DDPx0+ CN_DDPx3- CN_DDPx0- CN_DDPx_AUX_SEL CN_DDPx1+ CN_DDPx_CONFIG2 CN_DDPx_AUX+ CN_DDPx1- CN_DDPx2+ CN_DDPx_AUX- CN_DDPx_HPD...

  • Page 22: Gpib Connector

    1.3.2 GPIB Connector The GPIB connector is a micro D-sub 25P connector, controlling external bench-top instruments. Connection to other instruments requires the optional ACL-IEEE488-MD1-A cable. The onboard GPIB controller provides: Full compatibility with IEEE 488 standard Up to 1.5 MB/s data transfer rates Onboard 2 KB FIFO for read/write operations Driver APIs are compatible with NI-488.2 driver software Connection with up to 14 instruments...

  • Page 23: Reset Button

    PXI-63982 1.3.3 Reset Button The reset button, activated by insertion of any pin-like implement, executes a hard reset for the PXI-63982. 1.3.4 LED Indicators Three LED indicators on the faceplate indicate operational status of the PXI-63982, as follows. Figure 1-6: LED Indicators...

  • Page 24: Usb 2.0 Ports

    1.3.5 USB 2.0 Ports The PXI-63982 provides two USB 2.0 ports via USB Type-A con- nectors on the faceplate, all compatible with hi-speed, full-speed and low-speed USB devices. Supported boot devices include USB flash drive, USB floppy, USB CD-ROM, and others, with boot pri- ority and device settings configured in BIOS.

  • Page 25: Gigabit Ethernet Ports

    PXI-63982 1.3.6 Gigabit Ethernet Ports Dual Gigabit Ethernet connection is provided on the PXI-63982 front panel. 1000Base-T Signal 100/10Base-T Signal MDI0+ MDI0- MDI1+ MDI2+ Reserved MDI2- Reserved MDI1- MDI3+ Reserved MDI3- Reserved Table 1-6: Ethernet Port Pin Assignments Each Ethernet port includes two LED indicators, one Active/Link indicator and one Speed indicator, functioning as follows.

  • Page 26: Usb 3.0 Ports

    1.3.7 USB 3.0 Ports The PXI-63982 provides four Type-A USB 3.0 ports on the front panel, supporting SuperSpeed, Hi-Speed, full-speed, and low- speed downstream transmission. Multiple boot devices, including USB flash, USB external HD, and USB CD-ROM drives are sup- ported, with boot priority configured in BIOS.

  • Page 27: Onboard Connections And Settings

    PXI-63982 1.3.8 Onboard Connections and Settings Figure 1-7: Onboard Configuration SW1 Clear CMOS switch SATA connector Table 1-8: Onboard Configuration Legend Introduction...
  • Page 28 This page intentionally left blank. Introduction...

  • Page 29: Getting Started

    PXI-63982 Getting Started This chapter describes procedures for installing the PXI-63982 and making preparations for its operation, including hardware and soft- ware setup. Note that the PXI controller is shipped with RAM and an HDD or SSD preinstalled. Contact JYTEK or an authorized dealer if there are any problems during the installation.

  • Page 30: Operating System Installation

    Refer to the appropriate hardware manuals for specific device types and compatibility modes of JYTEK PXI products. 3. When installation is complete, reboot the system and set the boot device order in the BIOS Boot Setup Menu accordingly.

  • Page 31: Installation Environment

    Flat-head screwdriver Anti-static wrist strap Anti-static mat JYTEK PXI system controllers are electrostatically sensitive and can be easily damaged by static electricity. The equipment must be handled on a grounded anti-static mat, and operators must wear an anti-static wristband, grounded at the same point as the anti-static mat.

  • Page 32: Installing The Pxi-63982

    2.2.2 Installing the PXI-63982 1. Release the red locking lever. 2. Depress the latch. 3. Locate the system controller slot of the chassis (Slot 1). Getting Started...
  • Page 33 PXI-63982 into the chassis, as shown. 5. Elevate the latch until the PXI-63982 is fully seated in the chassis backplane. The alignment pin on the rear of the latch can be threaded into the best fit alignment port in the chassis rail.

  • Page 34: Replacing The Hard Drive Or Solid State Drive

    2.2.3 Replacing the Hard Drive or Solid State Drive The PXI controller provides a SATA 3.0 port with a pre-installed 2.5" SATA hard drive or solid state drive. Replacing the HDD or SSD is accomplished as follows. 1. Locate the five screws attaching the hard drive housing to the PXI controller, as shown.
  • Page 35 PXI-63982 4. Locate the four screws (two on each side, as shown) fix- ing the hard drive, and remove them. 5. To install an HDD, SSD, or other compatible SATA hard drive, reverse the steps and reinstall the PXI controller into the PXI system.

  • Page 36: Clearing Cmos

    2.2.4 Clearing CMOS In the event of a system malfunction causing the PXI controller to halt or fail to boot, clear the CMOS and restore the controller BIOS to its default settings. To clear the CMOS: 1. Shut down the controller operating system and turn off the PXI Chassis.

  • Page 37: Driver Installation

    Intel ME Driver GPIB Driver Intel RST Driver The following optional utility programs are also provided: MAPS Core Windows Software Suite for JYTEK Measure- ment, Automation, and PXI products PXI Platform Services After downloading and extracting a given file, run the executable and follow its instructions to complete installation.
  • Page 38 This page intentionally left blank. Driver Installation...

  • Page 39: A Appendix: Pxi Trigger I/O Functions

    A.1 Data Types The library uses these data types in pxitrigio.h in the directory X:\JYTEK\PXI Trigger IO\Include. It is recommended that you use these data types in your application programs. The table shows the data type names, ranges, and corresponding data types in C/C++, Visual Basic, and Delphi for reference.
  • Page 40 Type Type Description Range C/C++ Pascal Visual Basic (for 32-bit (Delphi) compiler) 32-bit single- -3.402823E38 precision float Single Single floating-point 3.402823E38 1.7976831348 64-bit double- 62315E308 precision double Double Double floating-point 1.7976831348 62315E309 PXI Trigger I/O Functions...

  • Page 41: Function Library

    PXI-63982 A.2 Function Library This section provides detailed definitions of the functions available in the function library. Each function includes a description, list of supported cards, syntax, parameter list and Return Code informa- tion. A.2.1 TRIG_Init Description Initializes trigger I/O function of PXI controller. TRIG_Init must be called before the invocation of any other trigger I/O function.

  • Page 42: Trig_Close

    A.2.2 TRIG_Close Description Closes trigger I/O function of PXI controller, releasing resources allocated for the trigger I/O function. Users must invoke TRIG_Close before exiting the application. Syntax C/C++ I16 TRIG_Close() Visual Basic TRIG_Close() As Integer Parameter None Return Code ERR_NoError ERR_BoardNoInit PXI Trigger I/O Functions...

  • Page 43: Trig_Setsofttrg

    PXI-63982 A.2.3 TRIG_SetSoftTrg Description Generates a TTL trigger signal to the trigger I/O SMB con- nector on the faceplate or the PXI trigger bus on the back- plane by software command. Syntax C/C++ I16 TRIG_SetSoftTrg(U8 Status) Visual Basic TRIG_SetSoftTrg (ByVal...

  • Page 44: Trig_Trigger_Route

    A.2.4 TRIG_Trigger_Route Description Routes the trigger signal between the trigger I/O SMB con- nector on the faceplate and the PXI trigger bus on the back- plane. This function also allows routing of the software- generated trigger signal to SMB connector or trigger bus. Syntax C/C++ I16 TRIG_Trigger_Route (U32 source, U32 dest,...
  • Page 45 PXI-63982 dest Destination of trigger routing can be one of the following. Available value Description PXI_TRIG_VAL_SMB SMB connector on the faceplate PXI_TRIG_VAL_TRIG0 PXI trigger bus #0 PXI_TRIG_VAL_TRIG1 PXI trigger bus #1 PXI_TRIG_VAL_TRIG2 PXI trigger bus #2 PXI_TRIG_VAL_TRIG3 PXI trigger bus #3...

  • Page 46: Trig_Trigger_Clear

    A.2.5 TRIG_Trigger_Clear Description Clears the trigger routing setting. Syntax C/C++ I16 TRIG_Trigger_Clear() Visual Basic TRIG_Trigger_Clear() As Integer Parameters None Return Code ERR_NoError ERR_BoardNoInit ERR_Trigger_Clr PXI Trigger I/O Functions...

  • Page 47: Trig_Getsofttrg

    PXI-63982 A.2.6 TRIG_GetSoftTrg Description Acquires the current software trigger state, with default state after system boot of Logic Low. Syntax C/C++ I16 TRIG_GetSoftTrg(U8 *Status) Visual Basic TRIG_GetSoftTrg (status As Byte) As Integer Parameters Status Returns the logic level of software trigger signal.

  • Page 48: Trig_Trigger_Route_Query

    A.2.7 TRIG_Trigger_Route_Query Description Acquires the current trigger signal routing path. Syntax C/C++ TRIG_Trigger_Route_Query (U32* source, U32* dest, U32* halfway) Visual Basic TRIG_Trigger_Route_Query (source As Long, dest As Long, halfway As Long) As Integer Parameters source Returns to the current source of trigger routing, with possi- ble values including Available Definition Defined Value...
  • Page 49 PXI-63982 dest Returns to the current destination of trigger routing, with possible values including: Available Definition Defined Value PXI_TRIG_VAL_NONE PXI_TRIG_VAL_SMB PXI_TRIG_VAL_TRIG0 PXI_TRIG_VAL_TRIG1 PXI_TRIG_VAL_TRIG2 PXI_TRIG_VAL_TRIG3 PXI_TRIG_VAL_TRIG4 PXI_TRIG_VAL_TRIG5 PXI_TRIG_VAL_TRIG6 PXI_TRIG_VAL_TRIG7 halfway Returns to the current halfway point of trigger routing, with possible values including:...

  • Page 50: Trig_Getdriverrevision

    A.2.8 TRIG_GetDriverRevision Description Acquires the PXI Trigger software driver version; format of the version number is major.minor1.minor2. Syntax C/C++ TRIG_GetDriverRevision(unsigned short *major, unsigned short *minor1, unsigned short *minor2) Visual Basic TRIG_GetDriverRevision (major Integer, minor1 As Integer, minor2 As Integer) As Inte- Parameters major Returns the major version number of the pxi trigger software...

  • Page 51: B Appendix: Bios Setup

    PXI-63982 Appendix B BIOS Setup B.1 Entering the BIOS 1. Power on or reboot the PXI controller. 2. Press the <Delete> or <Esc> key when the controller beeps. This should be concurrent with the main startup screen. The BIOS setup program loads after a short delay.

  • Page 52: Navigation

    B.2 Navigation The BIOS setup utility uses a key-based navigation system called hot keys. Most hot keys can be used at any time during navigation. Key(s) Function Right Arrow, Left Arrow Moves between different setup menus Up Arrow, Down Arrow Moves between options within a setup menu Opens a sub-menu or displays all available settings <Enter>...

  • Page 53: Menu Structure

    PXI-63982 B.3 Menu Structure This section presents the primary menus of the BIOS Setup Utility. Use the following table as a quick reference for the contents of the BIOS Setup Utility. The sub-sections that follow provide further details for each top-level menu and sub-menu and the setting options for each menu item.

  • Page 54: Main

    Displays Core version Compliancy Info only Displays compliance information JYTEK BIOS version Project Version Info only Date the JYTEK BIOS was built Build Date and Time Info only Access Level Info only Current BIOS menu access permission B.4.2 Processor Information...

  • Page 55: Pch Information

    PXI-63982 B.4.3 PCH Information Feature Options Description Name Info only Displays PCH name PCH SKU Info only Displays PCH SKU Stepping Info only Displays PCH stepping LAN PHY Revision Info only Displays LAN PHY revision ME FW Version Info only...
  • Page 56 B.4.4.2 Temperatures Feature Options Description CPU Temperature Current Info only Displays current CPU temperature Startup Info only Displays CPU startup temperature Info only Displays min. CPU temperature Info only Displays max. CPU temperature Board Temperature Current Info only Displays current board temperature Startup Info only Displays board startup temperature...

  • Page 57: System Date And Time

    PXI-63982 B.4.4.4 Runtime Statistics Feature Options Description Specifies the total time in minutes the Total Runtime Info only system has spent running in S0 state Specifies the time in seconds the system has been running in S0 state, where the...

  • Page 58: Advanced

    B.5 Advanced Provides settings for most user interfaces in the system. B.5.1 CPU Configuration Feature Options Description CPU Signature Info only Displays CPU signature Microcode Patch Info only Displays microcode revision Displays maximum CPU Max CPU Speed Info only operating Frequency Displays minimum CPU Min CPU Speed Info only...
  • Page 59 PXI-63982 Feature Options Description L4 Cache Info only Displays cache info Enabled for Windows XP and Linux (OS optimized for Hyper- Threading Technology) and Disabled Hyper-Threading disabled for other OS (not Enabled optimized); when Disabled only one thread per enabled core is...

  • Page 60: Memory Configuration

    B.5.2 Memory Configuration Feature Options Description Displays Memory Reference Code Memory RC Version Info only version Memory Frequency Info only Displays memory frequency Total Memory Info only Displays total memory Info only Displays the voltage DIMM#0 Info only Displays DIMM#0 DIMM#1 Info only Displays DIMM#1...

  • Page 61: Graphics Configuration

    PXI-63982 B.5.3 Graphics Configuration Feature Options Description Auto Selects which IGFX/PCIE graphics device Primary Display IGFX should be the primary display PCIE AUTO Keeps IGFX enabled based on the setup Internal Graphics Disabled options Enabled 128MB 256MB 512M Aperture Size...

  • Page 62: Onboard Devices Configuration

    B.5.4 Onboard Devices Configuration Feature Options Description LAN Port Configuration Enabled LAN1 #1 (Intel I219) Enables/disables onboard I219 LAN controller Disabled Enabled LAN2 #1 (Intel I210) Enables/disables onboard I210 LAN controller Disabled SATA Configuration Default Gen1 Indicates the maximum speed the SATA SATA Speed Selection Gen2 controller can support...

  • Page 63: Usb Configuration

    PXI-63982 B.5.5 USB Configuration Feature Options Description USB Module Version Info only USB Controllers Info only Display USB Controller type USB Devices Info only Lists USB-connected peripheral devices Enables legacy USB support, where Auto Enabled disables legacy support if no USB devices...

  • Page 64: Network Stack Configuration

    B.5.6 Network Stack Configuration Feature Options Description Enabled Network Stack Enables/disables UEFI network stack Disabled Enabled Enables/disables IPv4 PXE boot IPv4 PXE Support Disabled support Enabled Enables/disables IPv6 PXE boot IPv6 PXE Support Disabled support PXE Boot Wait Time 0 sec Wait time for ESC key to abort PXE boot Number of times presence of media will Media detect count...
  • Page 65 PXI-63982 B.6 Security Feature Options Description Provides information about password characteristics as Password Description Info only well as password length requirements: min. 3, max. 20 If ONLY the Administrator Password is set, then this only Administrator Password Enter password limits access to BIOS Setup and...
  • Page 66 B.6.1.1 Key Management Feature Options Description Disabled Install factory default Secure Boot Provision Factory Default Keys Enabled keys when System is in Setup Mode Force System to User Mode – install all Factory Default keys (PK, KEK, Enroll all Factory Default Keys N/A db, dbt, dbx).
  • Page 67 PXI-63982 B.7 Boot Feature Options Description Boot Configuration Number of seconds to wait for setup activation key; to wait Setup Prompt Timeout indefinitely, set to 65536 (0xFFFF) Set keyboard NumLock state at Bootup NumLock State boot Disabled Enable or disable Quiet Boot...
  • Page 68 B.7.1 CSM Configuration Feature Options Description Enabled CSM Support Enables or Disables CSM Support Disabled CSM16 Module Displays the CSM16 module Info only Version version number UPON REQUEST means GA20 can be disabled using BIOS services, Upon Request GateA20 Active ALWAYS means GA20 cannot be Always disabled;...
  • Page 69 PXI-63982 B.8 Save & Exit Feature Options Description Save Options Saves changes and exits system Save Changes and Exit setup Discards changes and exits system Discard Changes and Exit setup Save Changes and Reset Saves changes and resets system Discard Changes and...
  • Page 70 This page intentionally left blank. BIOS Setup...
  • Page 71 PXI-63982 Appendix C Dual BIOS Dual BIOS is a backup function that maintains normal operation of the PXI system module when unexpected boot failure occurs under the default BIOS. Dual BIOS consists of a main BIOS, a backup BIOS, and an independent controller. In normal boot, the main BIOS powers on and boots the system into the OS, moni- tored by the independent controller.
  • Page 72 This page intentionally left blank. Dual BIOS...
  • Page 73 PXI-63982 Appendix D Legacy Boot Mode Settings UEFI boot mode is default for the PXI-63982 BIOS. To boot in legacy boot mode, change related settings in the BIOS menu: 1. Power on and press <DEL> or <ESC> to enter BIOS menu 2.
  • Page 74 This page intentionally left blank. Legacy Boot Mode Settings...
  • Page 75 PXI-63982 Important Safety Instructions For user safety, please read and follow all instructions, Warnings, Cautions, and Notes marked in this manual and on the associated device before handling/operating the device, to avoid injury or damage. S'il vous plaît prêter attention stricte à tous les avertissements et mises en garde figurant sur l'appareil , pour éviter des blessures...
  • Page 76 A Lithium-type battery may be provided for uninterrupted backup or emergency power. Risk of explosion if battery is replaced with one of an incorrect type; please dispose of used batteries appropriately. Risque d’explosion si la pile est remplacée par une autre de CAUTION: type incorrect.
  • Page 77 PXI-63982 Getting Service Customer satisfaction is our top priority. Contact us should you require any service or assistance. Shanghai Jianyi Technology Co., Ltd. www.jytek.com Website Service Telephone No. +86-21-50475899 Fax No. Mailing +86-21-50475899 Address Room 201, Building 3, NO.300 Fangchun...

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