JYTEK PXIe-63985 User Manual

JYTEK PXIe-63985 User Manual

Pxi express embedded controller
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PXIe-63985
PXI Express Embedded Controller
User's Manual
Manual Rev.: 1.00
Revision Date: Jul.16, 2016

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Summary of Contents for JYTEK PXIe-63985

  • Page 1 PXIe-63985 PXI Express Embedded Controller User’s Manual Manual Rev.: 1.00 Revision Date: Jul.16, 2016...
  • Page 2: Getting Service

    Getting Service Contact us should you require any service or assistance. SHANGHAI JYTEK Co., Ltd. Web site: http://www.jytek.com Address: 300 Fang Chun Rd., Zhangjiang Hi-Tech Park, Pudong New Area, Shanghai, 201203 China Tel: +86-21-5047-5899 Fax: +86-21-5047-5899 Email: service@jytek.com Additional information, aids, and tips that help users perform tasks.
  • Page 3: Table Of Contents

    2 Getting Started �������������������������������������������������������������������������������������������13 2�1 Package Contents ������������������������������������������������������������������������������13 2.2 Operating System Installation ������������������������������������������������������������13 2.2.1 Installation Environment ��������������������������������������������������������14 2�2�2 Installing the PXIe-63985 ��������������������������������������������������������14 2�2�3 Replacing the Hard Drive or Solid State Drive �������������������������15 2.2.4 Replacing the Battery Backup �������������������������������������������������16 2�2�5 Clearing CMOS �����������������������������������������������������������������������17 3 Driver Installation ��������������������������������������������������������������������������������������18...
  • Page 4 A�2�4 TRIG_Trigger_Route ���������������������������������������������������������������24 A�2�5 TRIG_Trigger_Clear ����������������������������������������������������������������25 A.2.6 TRIG_GetSoftTrg ��������������������������������������������������������������������26 A.2.7 TRIG_Trigger_Route_Query����������������������������������������������������26 A�2�8 TRIG_GetDriverRevision ���������������������������������������������������������28 Appendix B BIOS Setup �����������������������������������������������������������������������������������29 B.1 Starting the BIOS �������������������������������������������������������������������������������29 B�2 Main Setup ���������������������������������������������������������������������������������������30 B�3 Advanced Setup ��������������������������������������������������������������������������������31 B�4 Boot Setup ����������������������������������������������������������������������������������������32 B.5 Security Setup �����������������������������������������������������������������������������������32 B�6 Save &...
  • Page 5 Table 1-4: LED Indicator Legend ����������������������������������������������������������������������� 8 Table 1-5: USB 2.0 Port Pin Assignment ������������������������������������������������������������ 9 Table 1-6: PXIe-63985 Ethernet Port Pin Assignments �������������������������������������� 9 Table 1-7: D-Sub 9p COM Port Signal Functions �����������������������������������������������11 Table 1-8: Onboard Configuration Legend �������������������������������������������������������12 Table B-1: BIOS Hot Key Functions ������������������������������������������������������������������30...
  • Page 6 List of Figures Figure 1-1: PXIe-63985 Functional Block Diagram���������������������������������������������� 2 Figure 1-2: PXIe-63985 Front Panel ������������������������������������������������������������������� 5 Figure 1-3: PXI Trigger SMB Jack������������������������������������������������������������������������ 6 Figure 1-4: DisplayPort Connector��������������������������������������������������������������������� 6 Figure 1-5: PXIe-63985 LED Indicators ��������������������������������������������������������������� 8 Figure 1-6: COM Port ���������������������������������������������������������������������������������������11 Figure 1-7: PXIe-63985 Onboard Configuration ������������������������������������������������12...
  • Page 7: Introduction

    With a configurable PCIe switch, the PXIe-63985 can support four links x4 or two links x16 x8 PXI Express link capability, with maximum system throughput of up to 8 GB/s.
  • Page 8: Specifications

    COM Port LPC- COM Port connector Trigger Bus Trigger Bus Trigger Signal Connector Controller Figure 1-1: PXIe-63985 Functional Block Diagram Processor • Intel® Core™ i7-4700EQ 2.4GHz processor • DMI (Direct Media Interface) with 5 GT/s bandwidth in each direction Chipset...
  • Page 9 • Supports non-ECC, unbuffered memory The externally accessible SODIMM socket can accept replacement DDR3L DRAM DIMM modules. PXIe-63985 specifications and stability guarantees are only supported when JYTEK- provided DDR3L DRAM DIMM modules are used. Video • DisplayPort supports up to 3840x 2160 @ 60 Hz resolution •...
  • Page 10 Environmental & Shock and Vibration values are only guaranteed with use of an JYTEK-provided SSD/HDD Certification Electromagnetic compatibility: • EMC/EMI: CE, FCC Class A • CE Compliance EN 61326-1 The PXIe-63985 meets the essential requirements of applicable European Directives. Power Requirements Voltage Rail 5V standby 3�3V Maximum power consumption 0.13A...
  • Page 11: 1�3 I/O And Indicators

    1�3 I/O and Indicators 1�3�1 Front Panel Figure 1-2: PXIe-63985 Front Panel PXI Trigger Connector (SMB jack) 4X Type-A USB 2.0 connectors 2X DisplayPort Connectors 2X Gigabit Ethernet GPIB Connector (Micro D-Sub 25P) 2X USB 3.0 Reset Button 1X COM port (D-sub9 serial)
  • Page 12: Figure 1-3: Pxi Trigger Smb Jack

    The PXI trigger connector is a SMB jack, used to route external trigger signals to or from the PXI backplane. Trigger signals are TTL-compatible and edge sensitive. The PXIe-63985 provides four trigger routing modes from/to the PXI trigger connector to synchronize PXI modules, including •...
  • Page 13: 1�3�2 Gpib Connector

    +V3.3_DDPx_PWR Table 1-2: DisplayPort Pin Assignment 1�3�2 GPIB Connector The GPIB connector on PXIe-63985 is a micro D-sub 25P connector, controlling external bench-top instruments. Connection to other instruments requires the optional ACL- IEEE488-MD1-A cable. The on-board GPIB controller provides: • Full compatibility with IEEE 488 standard •...
  • Page 14: Reset Button

    Table 1-4: LED Indicator Legend 1�3�5 USB 2�0 Ports The PXIe-63985 provides four USB 2.0 ports via USB Type A connectors on the faceplate, all compatible with hi-speed, full-speed and low-speed USB devices. Supported boot devices include USB flash drive, USB floppy, USB CD-ROM, and others, with boot priority and device settings configurable configured in BIOS.
  • Page 15: 1�3�6 Gigabit Ethernet Ports

    Signal Power 5V USB Data- USB Data + Ground Table 1-5: USB 2.0 Port Pin Assignment 1�3�6 Gigabit Ethernet Ports Dual Gigabit Ethernet connection is provided on the PXIe-63985 front panel. 1000Base-T Signal 100/10Base-T Signal MDI0+ MDI0- MDI1+ MDI2+ Reserved...
  • Page 16: 1�3�7 Usb 3�0 Ports

    1000 Mbps 1�3�7 USB 3�0 Ports The PXIe-63985 provides two Type A USB 3.0 ports on the front panel, supporting SuperSpeed, Hi-Speed, full-speed, and low-speed transmission for downstream. Multiple boot devices, including USB flash, USB external HD, and USB CD-ROM drives are supported, with boot priority configured in BIOS.
  • Page 17: 1�3�8 Com Port

    1�3�8 COM Port A COM port on the front panel with D-sub 9P connectors supports RS-232/RS-422/RS-485 by BIOS selection. Figure 1-6: COM Port Signal Name RS-232 RS-422 RS-485 DCD# TXD422- 485DATA- TXD422+ 485DATA+ RXD422+ DTR# RXD422- DSR# RTS# CTS# Table 1-7: D-Sub 9p COM Port Signal Functions...
  • Page 18: Onboard Connections And Settings

    1�3�9 Onboard Connections and Settings Figure 1-7: PXIe-63985 Onboard Configuration SATA Connector Clear CMOS switch System Battery Table 1-8: Onboard Configuration Legend...
  • Page 19: Getting Started

    • Display Port-to-VGA adapter • JYTEK All-In-One USB Flash Driver If any of these items are missing or damaged, contact JYTEK or the dealer from whom you purchased the product. Save the shipping materials and carton in case you want to ship or store the product in the future.
  • Page 20: Installation Environment

    • Anti-static wrist strap • Anti-static mat JYTEK PXIe-63985 system controllers are electrostatically sensitive and can be easily damaged by static electricity. The equipment must be handled on a grounded anti-static mat, and operators must wear an anti-static wristband, grounded at the same point as the anti-static mat.
  • Page 21: 2�2�3 Replacing The Hard Drive Or Solid State Drive

    5. Fasten the four mounting screws on the faceplate of PXIe-63985, and connect all peripheral devices. 2�2�3 Replacing the Hard Drive or Solid State Drive The PXIe-63985 provides a SATA 3.0 port with a pre-installed 2.5” SATA hard drive or solid state drive. Replacing the HDD or SSD is accomplished as follows.
  • Page 22: Replacing The Battery Backup

    5. To install a HDD or SSD or other compatible SATA harddrive, reverse the steps and reinstall the PXIe-63985 into the PXI system. 2.2.4 Replacing the Battery Backup The PXIe-63985 is provided with a 3.0 V “coin cell” lithium battery, replacement of which is as follows. 1. Turn off the PXI chassis.
  • Page 23: 2�2�5 Clearing Cmos

    5. Reinstall the embedded controller into the PXI chassis and restore power. 2�2�5 Clearing CMOS In the event of a system malfunction causing the PXIe-63985 to halt or fail to boot, clear the CMOS and restore the controller BIOS to its default settings. To clear the CMOS: 1.
  • Page 24: Driver Installation

    9. Install the SMBus driver 10.Install the RST driver 3�2 Installing the Chipset Driver This section describes installation of the chipset driver for PXIe-63985. The chipset driver directs the operating system to configure the Intel® QM87 chipset components. To install the chipset driver: 1.
  • Page 25: 3�4 Installing The Ethernet Driver

    3�4 Installing the Ethernet Driver To install the Ethernet driver: 1. Close any running applications. 2. Insert the JYTEK All-in-One USB Flash Driver (x: denotes the USB driver) ◦ The Win7 32-bit Ethernet driver is located in the directory: x:\Driver Installation\ PXI Platform\PXI controller\PXIe-63985\Win7_32bit\LAN\ ◦...
  • Page 26: 3�7 Installing The Pxi Trigger Driver

    4. Reboot the system 3�7 Installing the PXI Trigger Driver The PXIe-63985 controller provides a trigger I/O on the faceplate to route the trigger signal to and from the PXI trigger bus. Please see Appendix A: PXI Trigger I/O Function Reference for programming information.
  • Page 27: 3�9 Installing The Smbus Driver

    1. Close any running applications. 2. Insert the JYTEK All-in-One USB Flash Driver (x: denotes the USB driver) ◦ The 32bit Win7 SMBus driver is located in the directory: x:\ Driver Installation\PXI Platform\PXI controller\PXIe-63985\Win7_32Bit\SMBus\ ◦ The 64bit Win7 SMBus driver is located in the directory: x:\ Driver Installation\PXI Platform\PXI controller\PXIe-63985\Win7_64Bit\SMBus\ 3.
  • Page 28: Appendix A - Pxi Trigger I/O Function Reference

    Appendix A - PXI Trigger I/O Function Reference This appendix describes use of the PXI trigger I/O function library for the PXIe-63985 controller, to program routing of trigger signals between the trigger I/O SMB connector on the faceplate and the PXI trigger bus on the backplane. API files are located in the installation directory of the PXI Trigger I/O driver.
  • Page 29: Function Library

    A.2 Function Library This section provides detailed definitions of the functions available in the PXIe-63985 function library. Each function includes a description, list of supported cards, syntax, parameter list and Return Code information. A�2�1 TRIG_Init Description Initializes trigger I/O function of PXIe-63985 controller.
  • Page 30: Trig_Setsofttrg

    A�2�3 TRIG_SetSoftTrg Description Generates a TTL trigger signal to the trigger I/O SMB connector on the faceplate or the PXI trigger bus on the backplane by software command Syntax C/C++ I16 TRIG_SetSoftTrg(U8 Status) Visual Basic TRIG_SetSoftTrg (ByVal status As Byte) As Integer Parameters Status Logic level of trigger signal.
  • Page 31: A�2�5 Trig_Trigger_Clear

    Available value Description PXI_TRIG_VAL_TRIG1 PXI trigger bus #1 PXI_TRIG_VAL_TRIG2 PXI trigger bus #2 PXI_TRIG_VAL_TRIG3 PXI trigger bus #3 PXI_TRIG_VAL_TRIG4 PXI trigger bus #4 PXI_TRIG_VAL_TRIG5 PXI trigger bus #5 PXI_TRIG_VAL_TRIG6 PXI trigger bus #6 PXI_TRIG_VAL_TRIG7 PXI trigger bus #7 dest Destination of trigger routing. It can be one of the following values. Available value Description PXI_TRIG_VAL_SMB...
  • Page 32: Trig_Getsofttrg

    Clears the trigger routing setting Syntax C/C++ I16 TRIG_Trigger_Clear() Visual Basic TRIG_Trigger_Clear() As Integer Parameters None Return Code ERR_NoError ERR_BoardNoInit ERR_Trigger_Clr A�2�6 TRIG_GetSoftTrg Description Acquires the current software trigger state, with default state after system boot of Logic Syntax C/C++ I16 TRIG_GetSoftTrg(U8 *Status) Visual Basic TRIG_GetSoftTrg (status As Byte) As Integer...
  • Page 33 Syntax C/C++ I16 TRIG_Trigger_Route_Query (U32* source,U32* dest, U32* halfway) Visual Basic TRIG_Trigger_Route_Query (source As Long, dest As Long, halfway As Long) As Integer Parameters source Returns to the current source of trigger routing, with possible values including: Available Definition Defined Value PXI_TRIG_VAL_NONE PXI_TRIG_VAL_SMB PXI_TRIG_VAL_SOFT...
  • Page 34: A�2�8 Trig_Getdriverrevision

    Available Value Description PXI_TRIG_VAL_TRIG5 PXI_TRIG_VAL_TRIG6 PXI_TRIG_VAL_TRIG7 Return Code ERR_NoError ERR_BoardNoInit ERR_Query_Status A�2�8 TRIG_GetDriverRevision Description Acquires the PXI Trigger software driver version; format of the version number is major. minor1.minor2 Syntax C/C++ I16 TRIG_GetDriverRevision(unsigned short *major, unsigned short *minor1, unsigned short *minor2) Visual Basic TRIG_GetDriverRevision (major As Integer, minor1 As Integer, minor2 As Integer) As Integer...
  • Page 35: Appendix B Bios Setup

    The Basic Input/Output System (BIOS) provides a basic level of communication between the processor and peripherals. In addition, the BIOS also contains code for various advanced features applied to the PXIe-63985 controller. The BIOS setup program includes menus for configuring settings and enabling PXIe-63985 controller features.
  • Page 36: B�2 Main Setup

    Key(s) Function <F2> Loads previous values into the BIOS <F3> Restores optimal default values into the BIOS <F4> Saves the current configuration and exits BIOS setup Table B-1: BIOS Hot Key Functions Figure B-1: BIOS Setup Navigation A hot key legend is located in the right frame on most setup screens. The <...
  • Page 37: B�3 Advanced Setup

    Item Detail BIOS Information Includes BIOS version and the date on which the BIOS was built System Date & Time System Date Changes system date, date must be entered in MM/DD/YY format System Time Changes system time, time must be entered in HH:MM:SS format.
  • Page 38: B�4 Boot Setup

    Item Detail ACPI and Power Power management related setting, including ACPI mode Management and power-up mode Clock Enable or disable spread spectrum clock for PCIe reference clock (default is disabled) Thermal Controller thermal protection setting. Serial Port Configuration Set COM port mode between RS232/422/485 Miscellaneous Includes precision timer and security setting Table B-3: BIOS Advanced Setup Menu...
  • Page 39: B�6 Save & Exit Setup

    B�6 Save & Exit Setup The following options for saving and exiting can be chosen in this menu. Save Changes and Exit • Discard Changes and Reset • Save Changes and Reset Save Option • Save Changes • Discard Changes •...
  • Page 40: Important Safety Instructions

    Important Safety Instructions For user safety, please read and follow all instructions, WARNINGS, CAUTIONS, and NOTES marked in this manual and on the associated equipment before handling/operating the equipment. • Read these safety instructions carefully. • Keep this user’s manual for future reference. •...

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