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COMX-P40x0 ENP2 Installation and Use P/N: 6806800R95B August 2014...
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Artesyn reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Artesyn to notify any person of such revision or changes.
Amps ACPI Advanced Configuration Power Interface - software standard to implement power saving modes in PC-AT systems EEPROM Electrically Erasable Programmable Read-Only Memory General Purpose Input GPIO General Purpose Input Output General Purpose Output COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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An integrated circuit typically interfaced via the LPC bus that provides legacy PC I/O functions including PS2 keyboard and mouse ports, serial and parallel port(s) and a floppy interface. Universal Serial Bus Video Graphics Adapter Watch Dog Timer. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Repeated item for example node 1, node 2, ..., node Omission of information from example/command that is not necessary at the time being Ranges, for example: 0..4 means one of the integers 0,1,2,3, and 4 (used in registers) Logical OR COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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No danger encountered. Pay attention to important information Summary of Changes This manual has been revised and replaces all prior editions. Part Number Publication Date Description Initial version 6806800R95A August, 2013 Re-branded to Artesyn 6806800R95B August, 2014 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Chapter 1 Introduction Overview The COMX-P40x0 ENP2 is a COM Express module based on the Freescale Power PC P4040 and P4080 platforms. This board provides some of the universal interfaces such as Gigabit Ethernet, USB, PCIE, and so on. Following are the features of the COMX-P40x0 ENP2: Form Factor: Basic (95mm x 125mm) ...
5V standby power from COME connector not required/used by module Due to P4080 errata GEN-A009, Aurora ports are disabled by default in RCW and must be re-enabled for debug. For assistance, contact Artesyn representative. Standard Compliances The product is designed to meet the following standards.
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CISPR 22 CISPR 24 EN55022 EN EMC Requirements on system level 55024 ETSI EN 300 019 Series Environmental Requirement Directive 2011/65/EU Directive on the restriction of the use of certain hazardous substances in electrical and electronic equipment (ROHS) COMX-P40x0 ENP2 Installation and Use (6806800R95B)
We have an internal production control system that ensures compliance between the manufactured products and the technical documentation. 07/30/2014 ___________________________________________________ ______ Tom Tuttle, Manager, Product Testing Services Date (MM/DD/YYYY) COMX-P40x0 ENP2 Installation and Use (6806800R95B)
D7:DDR3 power ok D5:2.5V power ok D10:1.5V power ok D9:Platform Power OK D13:CORE power ok Debug led D19 Debug led D18 Thermal issue D17 D16:USB hub High Speed D15:USB hub Active Pin 1 COP header COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Introduction 1.3.1 COMX-P4080 ENP2 The following figure illustrates the top and side views of the COMX-P4080 ENP2 board. Figure 1-4 COMX-P4080 ENP2 Mechanical Dimensions (Top and side views) COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Introduction Table 1-2 COMX-P4080 ENP2 PCB Dimensions Characteristic Value Length 125 mm Width 95 mm PCB Thickness 2 mm Mounting height top side (component side 1) 6.1 mm COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Introduction 1.3.2 COMX-P4040 ENP2 The following figure illustrates the top and side views of the COMX-P4040 ENP2 board. Figure 1-5 COMX-P4040 ENP2 Mechanical Dimensions (Top and side views) COMX-P40x0 ENP2 Installation and Use (6806800R95B)
COMX-CAR-P1 Artesyn DEVELOPMENT CARRIER FOR QORIQ MODULES. COMX-P4000-ENP- Heatsink for COMX-P40x0 ENP2 module. HTSNK Product Identification This section shows the serial number and its location on the COMX-P4080 ENP2 and COMX- P4040 ENP2 boards. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
The following figure shows the location of serial number on COMX-P4080 ENP2 board. Figure 1-6 COMX-P4080 ENP2 Serial Number Location 1.5.2 COMX-P4040 ENP2 The following figure shows the location of serial number on COMX-P4040 ENP2 board. Figure 1-7 COMX-P4040 ENP2 Serial Number Location COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Introduction COMX-P40x0 ENP2 Installation and Use (6806800R95B)
-60 to 4000 m ASL Thermal Requirements A standard passive heat sink can be provided by Artesyn; 12 CFM system airflow volume (at C) is needed for the heat sink to keep sufficient cooling to the module. Contact your Artesyn sales representative for detailed thermal information.
During operation, hot surfaces may be present on the heat sinks and the components of the product. To prevent injury, do not touch any of the exposed components or heatsinks on the product when handling. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Before touching the product make sure that you are working in an ESD-safe environment with protective equipment such an ESD wrist strap and ESD shoes. Hold the product by its edges and do not touch any components or circuits. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
1. Line up the board-to-board connector of the module assembly with the board-to-board connector of the carrier board. 2. Make sure that the inter-connectors are properly aligned and that the five standoffs on the module have contact with the top of the carrier board. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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1. From the back side of the carrier, locate the five screws that connect the module assembly to the carrier board. 2. Loosen and remove the screws. 3. While holding the edges, pull the module from the carrier board. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
The figure below illustrates the screw-holes for mounting the module on carrier board. Figure 2-1 Mounting Module on Carrier Board This installation/removal procedure is only for reference. Assemble the heatsink and the module based on your own thermal solution. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Hardware Preparation and Installation Heat-sink Installation The following figures illustrate the heat-sink installation on the module: Figure 2-2 Heat-sink installation COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Hardware Preparation and Installation Figure 2-2 Heat-sink installation (continued) COMX-P40x0 ENP2 Installation and Use (6806800R95B)
The following table lists the pin-out of the COP header for modules with the P4040 CPU. Table 3-2 P4040 COP Header Pin-out Signal Name cpujtag_tdo empty 10k pullup cpujtag_tdi TRST# NC (RUNSTOP) VDDSENSE (+3.3V) NC (CKSTP INPUT) cop_srst_n empty cop_hrst_n key for p4040 cop nc for P4080 cpu_ckstp_out_n COMX-P40x0 ENP2 Installation and Use (6806800R95B)
The following table lists the pin-out of the AB- CD COMX connectors for the P40x0 COMX modules: Table 3-4 COMX AB-CD Connectors Connector Connector direction from refdes name Net Name COMX notes LAN1_MDI_N<3> bidir COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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LAN1_LINK100_N Lan1 link 100 active LAN1_LINK1000_N lan1 link 1000 active LAN1_MDI_N<2 bidir LAN1_MDI_P<2 bidir LAN1_LINK_N out from comx LAN1_MDI_N<1> bidir LAN1_MDI_P<1> bidir LAN1_MDI_N<0> bidir LAN1_MDI_P<0> bidir V1P8_CTRL out from comx 1.8v power indicator COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Net Name COMX notes POVDD_EN_KEY Power ON Enable LBC_CS_KEY Local Bus Control Chipselect key USB2_N bidir USB2_P bidir USB_OC_2_3_N USB0_N bidir USB0_P bidir V3P3_BAT 3.3v battery power USB2_PWREN USB0_PWREN USB5_PWREN SERDES_TX5_P COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Table 3-4 COMX AB-CD Connectors (continued) Connector Connector direction from refdes name Net Name COMX notes SERDES_TX5_N CPU_SDHC_DAT0 bidir SERDES_TX4_P SERDES_TX4_N SERDES_TX3_P SERDES_TX3_N LAN1_ACTIVITY_N lan1 activity TSEC_1588_CLK_OUT TSEC_1588_PULSE_OUT1 TSEC_1588_PULSE_OUT2 TSEC_1588_ALARM_OUT1 TSEC_1588_ALARM_OUT2 TSEC_1588_TRIG_IN1 TSEC_1588_TRIG_IN2 TSEC_1588_CLK_IN1 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Connector Connector direction from refdes name Net Name COMX notes WDT_OUT_N Watch dog Timer Out LBC_WE1_N P40x0 local bus LWE1_N LBC_LGPL5 CPU_IIC1_CLK bidir CPU_IIC1_DAT bidir USB_OC_4_5_N USB5_N bidir USB5_P bidir USB3_N bidir USB3_P bidir COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Net Name COMX notes USB_OC_0_1_N USB1_N bidir USB1_P bidir USB3_PWREN USB1_PWREN RESET_BUTTON_N CB_RESET_GPIO20_N SERDES_RX5_P SERDES_RX5_N CPU_SDHC_CMD bidir SERDES_RX4_P SERDES_RX4_N CPU_SDHC_WP SERDES_RX3_P SERDES_RX3_N SERDES_TX2_P SERDES_TX2_N CPU_SDHC_DAT1 bidir SERDES_TX1_P SERDES_TX1_N CPU_SDHC_DAT2 bidir SERDES_TX0_P COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Controls, LEDs, and Connectors Table 3-4 COMX AB-CD Connectors (continued) Connector Connector direction from refdes name Net Name COMX notes SERDES_TX0_N CPU_IIC2_CLK bidir CPU_IIC2_DAT bidir CPU_SDHC_DAT3 bidir CLK_125M_100M_COME_ SDREF1_P CLK_125M_100M_COME_ SDREF1_N CPU_SPI_CS0_K_N CPU_SPI_MISO CPU_SDHC_CLK COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Connector direction from refdes name Net Name COMX notes CPU_SPI_CLK_COME CPU_SPI_MOSI A100 A101 A102 A103 A104 A105 A106 A107 A108 A109 A110 SERDES_RX2_P SERDES_RX2_N CPU_SDHC_CD SERDES_RX1_P SERDES_RX1_N CPU_HRESET_COME_N Only used on P4080-2G assembly SERDES_RX0_P COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Controls, LEDs, and Connectors Table 3-4 COMX AB-CD Connectors (continued) Connector Connector direction from refdes name Net Name COMX notes SERDES_RX0_N V5SB V5SB V5SB V5SB CPU_SPI_CS1_N COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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LAN2_MDI_P<0> bidir LAN2_LINK_N LBC_LAD<8> bidir LBC_LAD<9> bidir LBC_CLE_N LBC_FCMALE_N SERDES_RX6_P SERDES_RX6_N SERDES_RX7_P SERDES_RX7_N LBC_LAD<10> bidir LBC_LAD<11> bidir LBC_LAD<12> bidir LBC_LAD<13> bidir LBC_LAD<14> bidir LBC_LAD<15> bidir CPU_UART1_SOUT CPU_UART1_SIN CPU_UART1_CTS Not used CPU_UART1_RTS Not used COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Table 3-4 COMX AB-CD Connectors (continued) Connector Connector direction from refdes name Net Name COMX notes CPU_UART2_SOUT CPU_UART2_SIN CPU_UART2_CTS Not used CPU_UART2_RTS Not used EMI1_MDIO bidir CPU_UART3_SOUT CPU_UART3_SIN CPU_UART4_SOUT CPU_UART4_SIN EMI1_MDC_COME SERDES_RX16_P SERDES_RX16_N COME_TYPE0_N SERDES_RX17_P SERDES_RX17_N COME_TYPE1_N SERDES_RX18_P SERDES_RX18_N COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Controls, LEDs, and Connectors Table 3-4 COMX AB-CD Connectors (continued) Connector Connector direction from refdes name Net Name COMX notes CPU_IRQ_OUT CPU_IRQ0 LBC_CLK0 LBC_CLK1 SERDES_TX6_P SERDES_TX6_N SERDES_TX7_P SERDES_TX7_N LBC_CS6_N LBC_CS3_N LBC_LA<31> bidir COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Controls, LEDs, and Connectors Table 3-4 COMX AB-CD Connectors (continued) Connector Connector direction from refdes name Net Name COMX notes B104 B105 B106 B107 B108 B109 B110 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Controls, LEDs, and Connectors COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Functional Description Overview The COMX-P40x0 ENP2 is a COM Express module based on the Freescale Power PC P4040/P4080 platform. This board provides some of the universal interfaces such as Gigabit Ethernet, USB, PCIE, and so on. This module is designed to support the QorIQ P4040/P4080 integrated processor at 1.2GHz core frequency.
The DDR controller is capable of self-refresh mode and an initialization bypass during system power-on after an abnormal shutdown for use by designers in preventing re-initialization. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
A30 high (+3.3V). CS3-6 are extended to the COM Express connector and are available for use. The following figure illustrates the distribution of local bus on the module: Figure 4-2 Distribution of Local Bus on P40x0 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
SERDES[16:19]. Bank 3 also routes 4 lanes to the COM Express connector but is unused for this module. Bank 1 provides 2 additional SERDES lanes on-board for CPU debugging through the Aurora interface. See note in the Overview on page COMX-P40x0 ENP2 Installation and Use (6806800R95B)
The protocol running on each lane or group of lanes routed to the COM Express connector is configured by the RCW. Available options are shown in the following table (slot numbers refer to COMX-CAR-P1 PCIe connector slots): Table 4-3 Options of the SERDES routed to COM Express Connectors Bank1 SerDes Bank1 SerDes 4-7 Bank2 SerDes 10-13...
Functional Description The following figure illustrates the distribution of SERDES lanes on the module: Figure 4-3 Distribution of SERDES Lanes COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Functional Description Thermal Management The COMX-P40x0 ENP2 module provides a thermal management strategy. This includes CPU junction temperature monitoring as shown in the following figure: Figure 4-4 Module Thermal Management A thermal diode is integrated in the P40x0, which connects to a thermal sensor ADT7411. The CPU can get the junction temperature via I2C.
4GB. Each memory bank consists of 9 memory chips of 8-bits with each bank located on opposite sides of the board. The SDRAM package height is a maximum of 1.2mm. The following figure illustrates the DDR memory architecture per controller: Figure 4-5 Memory Interface COMX-P40x0 ENP2 Installation and Use (6806800R95B)
IOEXT_GPI8 (PCA9557 I/O3) GPI8 of COME connectors IOEXT_GPO5 (PCA9557 I/O4) GPO5 of COME connectors IOEXT_GPO6 (PCA9557 I/O5) GPO6 of COME connectors IOEXT_GPO7 (PCA9557 I/O6) GPO7 of COME connectors IOEXT_GPO8 (PCA9557 I/O7) GPO8 of COME connectors COMX-P40x0 ENP2 Installation and Use (6806800R95B)
GPIO19: RCW [DMA1]=1b GPIO20: RCW [DMA2]=10b GPIO23/24: RCW [IRQ]=1b After reset, the direction for all GPIOs are set to input. All GPIOs used as output need to be reconfigured. Figure 4-6 Distribution of GPIO COMX-P40x0 ENP2 Installation and Use (6806800R95B)
SD card 0 (Default) Micro SD card 4.11 SPI Interface The COMX-P40x0 ENP2 provides a SPI bus from the P40x0 CPU with 3 chip-select signals. All SPI bus signals are routed to COM Express connectors. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
EMI1_MDC and EMI1_MDIO. All dTSEC interfaces in the P40x0 CPU share the same management hardware. External PHY access for all ports is available through the dTSEC1 registers of FM1. EMI1 is based on +2.5V signaling levels. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
SERDES connections configured for 10GE (XAUI). EMI2 has two pins: EMI2_MDC and EMI2_MDIO. External PHY access is performed through the 10GEC registers of FM1. EMI2 is based on +1.2V signaling levels. Figure 4-7 MDIO Routing COMX-P40x0 ENP2 Installation and Use (6806800R95B)
CPU. 4.17 USB The COMX-P40x0 ENP2 module has one USB port from the CPU connected through a USB ULPI PHY (USB3315) to a four-port hub (USB2514). The four ports of the hub are routed to the COM Express connector.
SDHC bus and remaining I2C buses are routed to the COM Express connectors. There is only one device attached to the second I2C bus I2C2, and there are 6 devices attached to the first I2C bus I2C1. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
M41T65Q6F Watchdog 0x30 I2C1 PCA9557PW-T IO-Expander 0xAC I2C1 MCP98243T-BE/ST SPD Channel A. This is optional and not populated by default. 0xA4 I2C1 MCP98243T-BE/ST SPD Channel B. This is optional and not populated by default. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Both EEPROMs support sequential read and page write. 4.18.3 I2C Device WDT The watchdog timer M41T65Q is located on I2C1, U2101 and the device address is 0xD0. It is able to generate a power-on reset and interrupt to the CPU. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
(bank 2 and 3 SERDES) is also selected through the FS0 strap pin which is connected to GPIO24 of the CPU and pin B98 of the COM Express connector. When low the frequency is 100MHz and when high it is 125MHz. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Functional Description COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Chapter 5 Clock Structure Overview The COMX-P40x0 ENP2 needs several kinds of single ended and differential clocks for booting up and normal operating. Following is the clock distribution tree: Figure 5-1 Clock Distribution GE PHY Crystal 100 MHz 100 MHz...
*Default:100MHz *Default:125MHz Table 5-2 Configuration of the frequency of SERDES reference clock by GPIO SERDES bank 1 reference clock SERDES bank 2 reference clock CPU_GPIO23=0, 100MHz CPU_GPIO24=0, 100MHz CPU_GPIO23=1, 125MHz CPU_GPIO24=1, 125MHz Default:100MHz Default:125MHz COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Overview This subsection describes the power supply system for the module. 12V Power is supplied to module from ATX-type (using Artesyn carrier) power supply through COM Express connectors and on-board regulators supply required voltages to devices on the module. Figure 6-1...
Power Domains Power Controlling Sequence The power sequencing of the COMX-P40x0 ENP2 differs between secure boot mode and non- secure boot mode. For secure boot mode, POVDD should be set to 1.5V DC and is powered at least 100 system clock cycles after the rising edge of power on reset signal. For non-secure boot mode, POVDD should be set to GND.
Prompt for the command line. help [cmd] or ? [cmd] Used to display the usage options for the command "cmd". If "cmd" is not specified, U-Boot will display the brief usage options for all of the available commands. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
The Basic Support Package (BSP) is hosted by an x86 computer running Linux. At least 1 GB free space is required where the BSP is hosted. Build Tools Artesyn is using build tools provided in Freescale SDK1.0 QorIQ-DPAA-SDK-20110609- systembuilder.iso to build BSP images for SCP-P4080-2G-ENP2. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
6. Install the Freescale LTIB using the following commands: ./install <Input /unixopt/sdk1.0 as the installation target directory> Do not interrupt the installation process. 7. Execute the cd /unixopt/sdk1.0/QorIQ-DPAA-SDK-20110609- systembuilder command. 8. Create a PDK project for P4080DS using the following command: COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Makefiles and scripts located in sub-directories to perform the operations. Makefile-p4080ds Top makefile for building/cleaning all of BSP images for P4080DS BSP release. It calls Makefiles and scripts located in sub-directories to perform the operations. misc/ misc/ contains FMAN uCode and RCW. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
By default, the factory sets up 10 MAC addresses in the ID EEPROM and u-boot will establish corresponding "ethXaddr" variables automatically. Network Variables setenv ipaddr 192.168.0.91 setenv netmask 255.255.255.0 setenv gatewayip 192.168.0.1 setenv serverip 192.168.0.100 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Address Variables for BSP Components on NOR Flash norrcwaddr Default is E8000000 norfmanaddr Default is E8200000 norfsaddr Default is E9000000 norbootaddr Default is EE000000 norfdtaddr Default is EFD00000 norubootenvaddr Default is EFEE0000 norubootaddr Default is EFF00000 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Boot up with ramboot (’run ramboot’ in U-Boot) or norboot (’run norboot’ in U-Boot). In Linux, run ’cat /etc/.version’ [root@COMX-P4080 root]# cat /etc/.version COMX-P4080 EXT2 ROOTFS ver: COMX_P4080_V100R00 build by ec7536@cncdebaobs04.emrsn.org on Mon Nov 29 08:46:50 UTC 2010 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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In the U-Boot, boot with nanboot (’run nandboot’). In Linux, run ’cat /etc/.version’ [root@COMX-P4080 root]# cat /etc/.version COMX-P4080 JFFS2 ROOTFS for nand.full FLASH ver: COMX_P4080_V100R00 build by ec7536@cncdebaobs04.emrsn.org on Mon Nov 29 08:47:50 UTC 2010 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
CPU0 is the active CPU in the U-Boot. Run the command "reset" to reboot the CPU/board. Address Space U-Boot and Linux work in 36-bit physical addressing mode. The relationship between effective address and physical address is displayed in the memory map table on Table "COMX-P4080 Address Space". COMX-P40x0 ENP2 Installation and Use (6806800R95B)
With Linux, up to 4 GB SDRAM can be verified. Do not modify the contents of the lowest 1 MB and the top 1 MB RAM in the U-Boot. Both areas are used to store critical data by U-Boot. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
GPIO19 Clock Generator Enable GPIO20 Carried board reset output GPIO23 Clock generator of bank 1 frequency selection input GPIO24 Clock generator of bank 2/3 frequency selection input For more information, see GPIO on page COMX-P40x0 ENP2 Installation and Use (6806800R95B)
I2C address = 0x18. For more information, see I2C on page 100. 7.12 UART There are a total of four universal asynchronous receiver/transmitters (UART) in the COMX- P40x0, each with Tx and Rx signals routed to the COM-E connectors. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Table 7-6 NOR Flash Command Usage Command Description protect on start end Protects flash from address "start" to address "end" protect on start +len Protects flash from address "start" to end of section with address "start"+"len"-1 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
64 pages, including 128 KB of data with 4 KB spare, making a total of 8192 blocks. NAND Flash supports the following commands: Table 7-7 NAND Flash Command Usage Command Description nand info Shows available NAND devices nand device [dev] Shows or sets current device nand read Addr off|partition size COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Writes to I2C device (auto-incrementing) i2c mw chip address[.0, .1, .2] value [count] Writes to I2C device (fill) i2c nm chip address[.0, .1, .2] Writes to I2C device (constant address) i2c probe Shows devices on the I2C bus COMX-P40x0 ENP2 Installation and Use (6806800R95B)
U-Boot provides several "mac" utilities to display and program the data in ID EEPROM. mac [read|save|id|num|errata|date|ports|0|1|2|3|4|5|6|7] mac read Shows content of EEPROM mac save Saves to the EEPROM mac id Programs system id mac num Programs system serial number COMX-P40x0 ENP2 Installation and Use (6806800R95B)
The U-Boot provides "brd" utilities to display and program the data in BOARD EEPROM. brd [read|save|id|pf|pv|pe|mf|mv|me|ms|md|ma] read Shows content of EEPROM brdsave Saves to the EEPROM brd id Programs board id brd pf Programs processor family brd pv Programs processor version brd pe Programs processor errata COMX-P40x0 ENP2 Installation and Use (6806800R95B)
COMX-P40x0 uses RTC and Watchdog features on M41ST85W. The I2C RTC/WDT M41ST85W (U12) is adopted on the COMX-P40x0 and located on I2C<1>. Boot up message in the U-Boot will be as follows: "RCT: M41ST85W@68" and "WDT: M41ST85W@68(disabled)". COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Enables WDT with timeout <timeout#> seconds. <timeout#> range [1...124] The following are usage examples of "wdt" for the COMX-P40x0. wdt status WDT: disabled. wdt enable 5 WDT: enabled with timeout 5 seconds. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
DTT1: CPU Temperature: 48 C 7.16 SPI The COMX-P40x0 ENP2 provides a SPI bus from the P40x0 CPU with 3 chip-select signals. All SPI bus signals are routed to COM Express connectors. For more information on the distribution of the SPI bus, see SPI Interface on page U-Boot provides "sf"...
Lists available devices 7.18 USB The COMX-P40x0 ENP2 module has one USB port from the CPU connected through a USB ULPI PHY (USB3315) to a four-port hub (USB2514). The four ports of the hub are routed to the COM Express connector. The hub is hardware strapped to indicate all ports removable. Two active- low overcurrent signals are received from the COM Express connector to the USB hub to indicate power faults: USB_OC_0_1_N (Port 0 and 1) and USB_OC_2_3_N (Port 2 and 3).
The COMX-P40x0 has three Serializer/Deserializer (SerDes) banks, including a total of 18 lanes. For more information on the SerDes, see SERDES Block on page 62. This includes the SerDes lane distribution and options when it is routed to the COM-E connectors. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Power off the board. For RCW options #7 or #8, a means to change the SERDES clock settings must be provided by the customer's carrier board. Power up the board. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Using option #5 from Table "Options of the SERDES routed to COM Express Connectors" on page 63 as an example, the boot up message will appear as below. Figure 7-2 Example of Boot Up Message in U-Boot COMX-P40x0 ENP2 Installation and Use (6806800R95B)
FM2 Network Ports Port 0 is named as FM2@DTSEC1 Port 1 is named as FM2@DTSEC2 Port 2 is named as FM2@DTSEC3 Port 3 is named as FM2@DTSEC4 Port 4 (XAUI) is named as FM2@TGEC1 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
The "x" in the name is important for the nfsboot. For more information, see Chapter 7, Boot, on page 119. To locate the X "x" in the "ethX", refer to the list below. FM2@DTSEC1 FM2@DTSEC1 FM2@DTSEC2 FM2@DTSEC3 FM2@DTSEC4 FM2@TGEC1 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
UDEV rules rename the default name "ethX" for network ports of frame manager for convenience and identification. Table 7-11 UDEV Rules for Network Ports in Linux FM1 Network Ports Port 0 (FM1@DTSEC1) is named as fm1-gb1 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
-p sudo chmod a+rwx /local/ /local/tmp/ Build a Release To build a release, run the ./build.sh <Version_Number> command. The version number is formatted as VxxxAxx, VxxxBxx, VxxxTxx or VxxxRxx. For example: V100B00. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
NOR flash uboot-clean: cleans the U-Boot Output The built image is u-boot.bin in the current working directory. 7.21.2 Build Linux Kernel The Linux kernel is based on SDK1.0 whose version is 2.6.34.6. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
rootfs-ext2: builds rootfs for ram disk rootfs-nfs: builds rootfs for nfs rootfs-clean: clean the rootfs Output The build images are rootfs_ext2.img and rootfs_nfs.tar.gz in the current working directory. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
TFTP server. 5. Change current directory to /tftpboot/comx_p4080/. 6. Unzip the .tar.gz file to the current directory. The following files are extracted to the COMX_P4080_V100B00/: comx.dtb rcw.bin rcw-codewarrior.bin rootfs_ext2.img rootfs_nfs.tar.gz COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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13. Test that the network and filename settings can download the files successfully. Example: => tftpboot $loadaddr $rcwfile => tftpboot $loadaddr $fmanfile => tftpboot $loadaddr $bootfile => tftpboot $loadaddr $norfsfile => tftpboot $loadaddr $fdtfile => tftpboot $loadaddr $ubootfile COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Chapter 7, USBFATboot and USBEXT2boot Chapter 7, MMCFATboot and MMCEXT2boot Common device environment variables in U-Boot include the following: uart# and consoledev - ttyS0 - ttyS1 - ttyS2 - ttyS3 ethact and netdev COMX-P40x0 ENP2 Installation and Use (6806800R95B)
7.23.2 NORboot COMX-P40x0 has a U-Boot variable called "norboot" setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $hwbootargs $othbootargs;bootm $norbootaddr $norfsaddr $norfdtaddr "norboot" will load RAMDISK, Linux kernel and DTB from NOR Flash into RAM then boot. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
MTD device for JFFS2 rootfs on NAND FLASH norbootaddr Linux kernel address on NOR FLASH norfdtaddr DTB address on NOR FLASH Below are examples of critical environment variables: => setenv jffs2nand mtdblock7 => setenv norbootaddr EE000000 => setenv norfdtaddr EFD00000 COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Both partitiions contain a directory /boot/ and the directory has kernel DTB files. EXT2 partition contains the rootfs which can be from rootfs_nfs.tar.gz 7.23.6 MMCFATboot and MMCEXT2boot COMX-P40x0 has a U-Boot variable called "mmcfatboot". COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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Similar to the USB drive, users need to create two partitions on the MMC/SDHC card. FAT32 is the first partition and the EXT2 is the second partition. Both partitions contain a directory /boot/ and the directory has kernel DTB files. EXT2 partition contains the rootfs which can be from rootfs_nfs.tar.gz. COMX-P40x0 ENP2 Installation and Use (6806800R95B)
The publications listed below are referenced in this manual. You can obtain electronic copies of Artesyn Embedded Technologies - Embedded Computing publications by contacting your local Artesyn sales office. For released products, you can also visit our Web site for the latest copies of our product documentation.
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Related Documentation COMX-P40x0 ENP2 Installation and Use (6806800R95B)
Do not install substitute parts or perform any unauthorized modification of the equipment or the warranty may be voided. Contact your local Artesyn representative for service and repair to make sure that all safety features are maintained.
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Safety Notes COMX-P40x0 ENP2 Installation and Use (6806800R95B)
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