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Artesyn COMX-P4080-2G-ENP2 Installation & Use Manual

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COMX-P4080-2G-ENP2
Installation and Use
P/N: 6806800P63B
August 2014

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Summary of Contents for Artesyn COMX-P4080-2G-ENP2

  • Page 1 COMX-P4080-2G-ENP2 Installation and Use P/N: 6806800P63B August 2014...
  • Page 2 Artesyn reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Artesyn to notify any person of such revision or changes.

  • Page 3: Table Of Contents

    4.10 Memory Map ..............42 COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 4 7.3.4 Build Misc Firmware ............64 COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 5 NFSBOOT ................67 COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 6 Contents Contents Contents COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 7 BSP Source Code Package Layout ..........60 COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 8 List of Tables COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 9 Figure 6-2 Power Sequence of COMX-P4080-2G-ENP2 ....... . 58 COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 10 List of Figures COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 11: About This Manual

     module Chapter 7, BSP, on page 59 describe how to build COMX-P4080-2G-ENP2 Basic Support  Package (BSP) and deploy the built images on COMX-P4080-2G-ENP2. Abbreviations This document uses the following abbreviations: Abbreviation Definition ANSI...
  • Page 12 Flip Chip Plastic Ball Grid Array GigaBytes Gbit Gigabit Gbps Gigabits Per Second General Purpose Input GPIO General Purpose Input Output General Purpose Output GMII Gigabit Media Independent Interface General Purpose Register Hardware Identification Input/Output COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 13 Read-Only Memory Real-Time Clock Rear Transition Module SATA Serial Advanced Technology Attachment SDRAM Synchronous Dynamic Random Access Memory SGMII Serial Gigabit Media Independent Interface Surface Mount Technology Serial Presence Detect SRAM Static Random Access Memory COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 14 Used to characterize user input and to separate it Courier + Bold from system output Reference Used for references and for table and figure descriptions File > Exit Notation for selecting a submenu <text> Notation for variables and keys COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 15 Indicates a hazardous situation which, if not avoided, may result in minor or moderate injury Indicates a property damage message. No danger encountered. Pay attention to important information. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 16 About this Manual About this Manual Summary of Changes This manual has been revised and replaces all prior editions. Part Number Publication Date Description 6806800P63A August 2012 Initial Version 6806800P63B August 2014 Re-branded to Artesyn template. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 17: Safety Notes

    Artesyn intends to provide all necessary information to install and handle the product in this manual. Because of the complexity of this product and its various uses, we do not guarantee that the given information is complete.
  • Page 18 Safety Notes COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 19: Introduction

    Chapter 1 Introduction The COMX-P4080-2G-ENP2 is a COM Express module based on the Freescale Power PC P4080 platform.This board provides some of the universal interfaces such as Gigabit Ethernet, USB, PCIE, and so on. Features Following are the features of the COMX-P4080-2G-ENP2: Form Factor: Basic (95mm x 125mm) Bullet list 2 ...

  • Page 20: Standard Compliances

    Table 1-1 Standard Compliance Standard Description UL60950-1 EN 60950-1 IEC 60950-1 Safety Requirements CAN/CSA C22.2 No 60950-1 CISPR 22 CISPR 24 EN55022 EN EMC Requirements on system level 55024 ENTSI EN 300 019 Series Environmental Requirement COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 21: Figure 1-1 Declaration Of Conformity

    We have an internal production control system that ensures compliance between the manufactured products and the technical documentation. 08/12/2014 ___________________________________________________ ______ Tom Tuttle, Manager, Product Testing Services Date (MM/DD/YYYY) COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 22: Mechanical Data

    Introduction Mechanical Data The following figures are the top and bottom view of the board: Figure 1-2 COMX-P4080-2G-ENP2 Mechanical Dimensions (Top and side views) Table 1-2 PCB Dimensions Characteristics Value Height 95 mm Length 125 mm COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 23: Ordering Information

    Supported Board Models As of the printing date of this manual, this guide supports the board models listed in the following table: Order Number Description COMX-P4080-2G-ENP2 QorIQ P4080 with 2GB memory, ENP2. COM Express Basic size COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 24: Product Identification

    Introduction Product Identification The following figure shows the location of the board's serial number: Figure 1-3 Location of Product Serial Number COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 25: Hardware Preparation And Installation

    A standard passive heat sink or heat spreader can be provided by Emerson; 12 CFM system airflow volume (at 71 C) is needed for the heat sink to keep sufficient cooling to the COMXP4080-2G-ENP2. Contact your Emerson sales representative for current information on the detailed thermal information of the COMX-P4080-2G-ENP2. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 26: Table 2-2 Critical Temperature Spots

    To prevent injury from hot surface, do not touch any of the exposed components or heats- inks on the product when handling. Use the handle and face plate, where applicable, or the board edge when removing the product from the enclosure. Power Requirements COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 27: Unpacking And Inspecting The Board

    1. Verify that you have received all items of your shipment: Printed Quick Sart Guide and Safety Notes  COMX-P4080-2G-ENP2 Board  Drivers CD  2. Check for damage and report any damage or differences to customer service. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 28: Installing And Removing The Module On The Carrier Board

    Removing the COM module from the carrier board 1. From the back side of the carrier, locate the five screws that connect the module assembly to the carrier board. 2. Loosen and remove the screws. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 29 Hardware Preparation and Installation 3. While holding the edges, pull the module from the carrier board. This installation procedure is only for reference. Assemble the heat-sink and the module based on your own thermal solution. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 30 Hardware Preparation and Installation COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 31: Controls, Leds, And Connectors

    Table 3-1 JTAG connector Pin-out Pin Number Signal Name CKSTP OUTPUT HRST SRST CKSTP INPUT VDDSENSE RUNSTOP TRST On-board LEDs There are several LEDs provided on the module to denote the statements of the system. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 32: Table 3-2 Led And Statements Of The System

    3.3V power OK 2.5V power OK 1.8V power OK CORE power OK PLATFORM power OK 1.5V power OK USB hub 1 active USB hub 1 high speed USB hub 2 active USB hub 2 high speed COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 33: Functional Description

    Chapter 4 Functional Description The COMX-P4080-2G-ENP2 is a COM Express module based on the Freescale Power PC P40x0 platform.This board provides some of the universal interfaces such as Gigabit Ethernet, USB, PCIE, and so on. This board is designed to support the QorIQ P4080 integrated processor running at the speed of 1.2GHz.

  • Page 34: Processor Core And Cache Memory Complex

    Local Bus The local bus is connected to a 2 Gb or 256 MB NOR Flash and a 08 G bits or 1 G Bytes COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 35: Clock

    Ratio Register (LCRR). The divisor is 32 when GPCM is selected as RCW source. So the eLBC clock is platform clock / 32 = 800MHz / 32 = 25MHz. NOR FLASH The NOR FLASH is attached to the GPCM on local bus and works at 16-bit mode. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 36: Nor Flash Map

    Kernel Image Static 2040 0FF0 0000 0FF5 FFFF 384 KB Device Tree Blob Static 2043 0FF6 0000 0FF7 FFFF 128 KB U-Boot Env Variable Static 2044 0FF8 0000 0FFF FFFF 512 KB U-Boot Image Static COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 37: Nand Flash

    NAND FLASH JFFS2 rootfs HSSI or SERDES Block COMX-P4080-2G-ENP2 contains SERDES 3 banks including a total of 18 lanes. From the 18 lanes of SERDES, 12 are routed to the COM Express connectors, defined as SERDES0~ SERDES7 (SERDES0~7 of bank 1) and SERDES16~SERDES19 (SERDES10~13 of bank 2).

  • Page 38: Table

    SRIO2 x4 SRIO1 x4 SGMII x 4 0x16 4x SGMII (1.25 (3.125Gbps) (3.125Gbps) (1.25Gbps) Gbps) PEX1 x4 SRIO1 x4 XAUI (3.125Gbps) 0x22 XAUI (2.5Gbps) (2.5Gbps) PEX1 x4 SRIO1 x4 XAUI (3.125Gbps) 0x22 XAUI (5Gbps) (2.5Gbps) COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 39: Figure 4-3 Distribution Of Serdes Lanes

    Functional Description The following figure illustrates the distribution of SERDES lanes on P4080: Figure 4-3 Distribution of SERDES Lanes COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 40: Thermal Management

    Functional Description Thermal Management COMX-P4080-2G-ENP2 provides a thermal management strategy. This includes CPU junction temperature monitoring.The following diagram shows thermal management strategy: Figure 4-4 Board Thermal Management A thermal diode is integrated in P40x0, which connects to a thermal sensor ADT7411. The CPU can get the junction temperature via I2C.

  • Page 41: Main Memory

    Total bottom height limit is specified as xx mm while the SDRAM's height is 1.2mm (max). The memory interface includes all the necessary termination and IO powers. The following figure illustrates the DDR memory architecture per controller: Figure 4-5 Memory Interface COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 42: Memory Map

    MT41J128M8HX-15E IT:D Memory Size 1Gb 128x8 Supply voltage 1.5V Oracle Number 5106813C95 4.10 Memory Map The following table provides the memory map of COMX-P4080-2G-ENP2. Table 4-5 Memory Map 32-bit Effective Address# Base Address 36-bit Physical Base Address Size Description 0000 0000...

  • Page 43: Gpio

    2GB memory is fitted. More than 2GB can be used in Linux. Up to 4GB has been verified. Address #4 and #5 is used instead of address #3 if RIO is configured. 4.11 GPIO COMX-P4080-2G-ENP2 consists of totally 21 GPIOs. The following table lists the GPIOs: Table 4-6 GPIO GPIO Name Function...

  • Page 44: Table

    GPO8 of COME connectors GPIO18, 19, 20, 23, 24 and 26 are multiplexed with other functional blocks. The pins should be configured as GPIO in RCW data. GPIO18/19: RCW [DMA1]=1b GPIO20: RCW [DMA2]=10b GPIO23/24/26: RCW [IRQ]=1b COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 45: Sdhc

    After reset, the direction for all GPIOs are set to input. So all the GPIOs used as output needs to be reconfigured. Figure 4-6 Distribution of GPIO 4.12 SDHC COMX-P4080-2G-ENP2 provides an SD/MMC interface to the COM Express connector and there should be a SD card connector provided on the carrier. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 46: Spi Interface

    SD card OFF (Default) Micro SD card 4.13 SPI Interface COMX-P4080-2G-ENP2 provides a SPI bus with 3 chip-select signals. All SPI bus signals are routed to COM Express connectors. The following figure illustrates the distribution of SPI bus: Figure 4-7 Distribution of SPI Bus 4.14 LAN...

  • Page 47: Mdio

    #5/#6 or #10 is applied. 4.15 UART INTERFACE COMX-P4080-2G-ENP2 consists of 4 UARTS (Tx and Rx signals for each UART) or 2 DUARTS (Tx, Rx, CTS, RTS signals for each DUART) that are routed to the COM Express connectors. Several optional resistors are provided to determine whether UARTS or DUARTS are routed.

  • Page 48: Rtc & Wdt

    (USB2514).The interface between the USB controller and USB PHY is ULPI bus, the second group of multiplexing interface RGMII/ULPI. So the RCW should be properly set for the using of the second group of ULPI bus. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 49: Four Usb Ports

    All four USB interfaces are directly connected to the COM Express connector. All the four USB ports signals with two over current detecting signals, USB_OC_0_1_N and USB_OC_2_3_N are routed to the COM Express connectors. USB_OC_0_1_N is for USB0 and USB1, USB_OC_2_3_N is for USB2 and USB3. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 50: I2C Interface

    I2C bus I2C1. The following figure illustrates the distribution of the I2C buses: Figure 4-8 Distribution of I2C buses Table 4-12 I2C Interface Address Component Function Oracle Number 0xD0 I2C1 9FG104DGILFT Clock Generator 51NL9655W46 COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 51: I2C Device Thermal Sensor

    THERM output, if required. By default, u-boot should mask THERM and ALERT output, set the temperature measurement range from 0 C to +127 C. For setting operation mode and fetching the monitoring temperature, u-boot should provide u-boot commands. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 52: I2C Device Eeprom

    By default, u-boot should mask event output and disable WDT.  U-boot should provide commands for enabling WDT and disabling WDT.  4.18.4 I2C Device RTC The RTC M41S62L is located on I2C2, U2100 and the device address is 0xD0. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 53: I2C Device Clock Generator

    Frequency selection can be accomplished via strap pins or SMBus control. By default, strap pins work. For COMX-P4080-2G-ENP2, the input clock for ICS9FG104 is 25 MHz and three differential output pairs are provided. First pair are connected to SerDes Bank 1, second pair are connected to x2 Aurora Connector, and third pair are connected to COM Express connector.
  • Page 54 In SMBus case, the CFG_SEL1 and CFG_SEL0 pins must be 01, so that Hub can be configured as an SMBus slave for external download of user-defined descriptors. U-boot should initialize USB hub during boot-up and provide u-boot commands for reading/ writing the hub's registers. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 55: Clock Structure

    Chapter 5 Clock Structure The COMX-P4080-2G-ENP2 needs several kinds of single ended and differential clocks for booting up and normal operating. Following is the clock distribution tree: Figure 5-1 Clock Distribution For ruggedized variant where dip switches are not mounted, the following signals connects to...

  • Page 56: Table 5-1 Configuration Of The Frequency Of Serdes Reference Clock By Gpio

    Gbps, it should be set as 100 MHz. For example, if lanes in bank 1 are configured as PCIE, then the bank 1 reference clock should be set as 100 MHz, and if XAUI, then should be set as 125 MHz. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 57: On-Boards Power Domains

    This subsection describes the power supply system for the module. Power is supplied to module from ATX-type (using Emerson carrier) power supply through COM Express connectors and on-board regulators supply required voltages to devices on the module. Figure 6-1 Power Tree COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 58: Power Controlling Sequence

    On-Boards Power Domains Power Controlling Sequence The power sequencing of COMX-P4080-2G-ENP2 differs between secure boot mode and non- secure boot mode. For secure boot mode, POVDD should be set to 1.5V DC and is powered at least 100 system clock cycles after the rising edge of power on reset signal. For non-secure boot mode, POVDD should be set to GND.

  • Page 59: Bsp

    4. Create a /opt/freescale directory and update access privileges using the following command. sudo mkdir -p /unixopt/sdk1.0 sudo chmod a+rwx /unixopt/sdk1.0 5. Change directory to mount using the following command: cd /mnt/ 6. Install the Freescale LTIB using the following commands: ./install COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 60: Bsp Source Code Package

    BSP Source Code Package 7.2.1 De-Compose Source Code Package Copy the COMX-P4080-2G-ENP2 released BSP source code package COMX_P4080_SRC_<Version Number>.tar.gz to the build host and un-compress it in current directory: tar xzvf COMX_P4080_SRC_<Version Number>.tar.gz There will be a newly-created folder named P4080 which contains SCP-P4080-2G-ENP2 source code.

  • Page 61: Setup Build Environment

    By default, the output directory for building BSP images is /local/tmp/.You need to create this directory and provide full privileges for all users to access. Use the following commands to create directory and provide privileges: COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 62: Build U-Boot

    RCW used for codewarrior to burn image to NOR Flash  rootfs_ext2.img: RAMDISK image  rootfs_nfs.tar.gz: NFS rootfs  u-boot.bin (U-Boot)  uImage: Linux kernel image  7.3.1 Build U-Boot The U-Boot is based on SDK1.0 whose version is U-Boot 2011.06-rc2. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 63: Build Linux Kernal

     dtb: compiles device tree binary  Output The build images are uImage and comx.dtb in the current working directory 7.3.3 Build ROOTFS The rootfs for SCP-P4080-2G-ENP2 include RAMDISK and NFS. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 64: Build Misc Firmware

    Both images are binary files and need not to re-build. They are copied to release package while building. Deploy BSP Image This section explains how to deploy BSP images. Assuming that you have built a BSP release package COMX_P4080_V100B00.tar.gz by running ./build.sh V100B00 located at /local/ tmp/. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 65: Pre-Deployment Steps

    9. Restart NFS service to export /tftpboot/comx_p4080/rootfs_nfs/ using the sudo /sbin/service nfs restart command. 10. The following commands should be executed in U-boot command line. 11. Setup the U-Boot environment variables for the network settings. Example: => setenv ethaddr 00:01:af:12:23:01 COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 66: Deploying Bsp Image On Nor Flash

    => run updrcw; run updfman; run updkernel; run updnorfs; run updfdt; run upduboot 2. Erase previous U-Boot environment settings using the => run eraenv command. 3. Reset the board using the => reset command. The board will boot up with new BSP COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)

  • Page 67: Ramboot

    Run run nfsboot in U-Boot. nfsboot will load Linux kernel and DTB into RAM via network by TFTP and then boot. And then mounting NFS on remote server as rootfs. For details, please refer to SCP-P4080-2G-ENP2 User Manual. COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 68 COMX-P4080-2G-ENP2 Installation and Use (6806800P63B)
  • Page 70 Artesyn Embedded Technologies, Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies, Inc. All other product or service names are the property of their respective owners. © 2014 Artesyn Embedded Technologies, Inc.

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