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COMX-P40x0 ENP2
Artesyn COMX-P40x0 ENP2 Manuals
Manuals and User Guides for Artesyn COMX-P40x0 ENP2. We have
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Artesyn COMX-P40x0 ENP2 manual available for free PDF download: Manual
Artesyn COMX-P40x0 ENP2 Manual (130 pages)
Brand:
Artesyn
| Category:
Control Unit
| Size: 8 MB
Table of Contents
Table of Contents
3
About this Manual
11
Introduction
15
Overview
15
Standard Compliances
16
Table 1-1 Standard Compliances
16
Figure 1-1 Declaration of Conformity
18
Mechanical Data
19
Figure 1-2 COMX-P40X0-ENP2 Top View
19
Figure 1-3 COMX-P40X0-ENP2 Bottom View
20
Comx-P4080 Enp2
21
Figure 1-4 COMX-P4080 ENP2 Mechanical Dimensions (Top and Side Views)
21
Table 1-2 COMX-P4080 ENP2 PCB Dimensions
22
Comx-P4040 Enp2
23
Figure 1-5 COMX-P4040 ENP2 Mechanical Dimensions (Top and Side Views)
23
Ordering Information
24
Product Identification
24
Table 1-3 COMX-P4040 ENP2 PCB Dimensions
24
Table 1-4 Ordering Information
24
Comx-P4080 Enp2
25
Comx-P4040 Enp2
25
Figure 1-6 COMX-P4080 ENP2 Serial Number Location
25
Figure 1-7 COMX-P4040 ENP2 Serial Number Location
25
Hardware Preparation and Installation
27
Environmental and Power Requirements
27
Environmental Requirements
27
Table 2-1 Environmental Requirements
27
Table 2-2 Critical Temperature Spots
28
Unpacking and Inspecting the Enclosure
29
Current Drawn
29
Table 2-4 COMX-P4080-4G-E-ENP2
29
Installing and Removing the Module on the Carrier Board
30
Figure 2-1 Mounting Module on Carrier Board
32
Figure 2-2 Heat-Sink Installation
33
Controls, Leds, and Connectors
35
Connectors and Switches
35
On-Board Connectors
35
Table 3-1 P4080 COP Header Pin-Out
35
Table 3-2 P4040 COP Header Pin-Out
36
On-Board Leds
37
COMX AB-CD Connectors
37
Table 3-4 COMX AB-CD Connectors
37
Table
49
Table
51
Table
53
Table
55
Functional Description
57
Overview
57
Block Diagram
58
Figure 4-1 COMX-P40X0 ENP2 Block Diagram
58
Processor Core and Cache Memory Complex
59
Integrated Memory Controller
59
Local Bus
60
Figure 4-2 Distribution of Local Bus on P40X0
60
Clock
61
Nor Flash
61
NOR FLASH Map
61
Nand Flash
62
SERDES Block
62
NAND FLASH Map
62
Table 4-3 Options of the SERDES Routed to COM Express Connectors
63
Figure 4-3 Distribution of SERDES Lanes
64
Thermal Management
65
Figure 4-4 Module Thermal Management
65
Main Memory
66
Memory Interface
66
Figure 4-5 Memory Interface
66
Memory Map
67
Gpio
68
Figure 4-6 Distribution of GPIO
69
Sdhc
70
SPI Interface
70
Gpio
70
Table 4-7 SD or Micro SD Card on the Carrier
70
Lan
71
Mdio
71
MDIO Routing
72
Phy
73
UART Interface
73
Real Time Clock
73
Watchdog Timer
73
Usb
73
I2C Interface
74
I2C Interface
75
Figure 4-8 Distribution of I2C Buses
75
I2C Device Thermal Sensor
76
I2C Device EEPROM
76
I2C Device WDT
76
I2C Device RTC
77
I2C Device Clock Generators
77
Clock Structure
79
Overview
79
Table 5-1 Configuration of the Frequency of SERDES Reference Clock by Carrier
79
Figure 5-1 Clock Distribution
79
Table 5-2 Configuration of the Frequency of SERDES Reference Clock by GPIO
80
Power Domains
81
Overview
81
Power Controlling Sequence
82
Figure 6-2 Power Sequence of COMX-P40X0 ENP2
82
Bsp
83
Overview
83
Setup Requirements
83
Basic Commands
83
Table 7-1 Basic U-Boot Commands
83
BSP Build Requirements
84
Install Build Tools of SDK1.0
85
BSP Source Code Package
86
Compose Source Code Package
86
Table 7-2 BSP Source Code Package Layout
86
Basic Environment Variable Settings
87
Setup Build Environment
87
Network Variables
87
Filename Variables for BSP Components
88
Address Variables for BSP Components on nor Flash
88
Address Variables for the Boot Components in RAM
89
Device Variables
89
HWCONFIG Variable
89
Bootargs Variable
90
Bootup Variables
90
Checking the BSP Version
91
Cpu
93
Address Space
93
Figure 7-1 COMX-P4080 CPU Information
93
Table 7-3 COMX-P4080 Address Space
94
Ddr3 Sdram
95
Gpio
96
GPIO States
96
Uart
97
Table 7-5 GPIO Command Usage
97
NOR Flash
98
Table 7-6 nor Flash Command Usage
98
NAND Flash
99
Table 7-7 NAND Flash Command Usage
99
I2C
100
ID Eeprom
101
Board EEPROM
102
Real Time Clock (RTC) and Watchdog Timer (WDT)
103
Dtt
105
Spi
105
MMC/Sdhc
106
Usb
106
Serdes
107
Figure 7-2 Example of Boot up Message in U-Boot
109
Network
110
Table 7-9 Network Ports Naming Rules in U-Boot
110
Table
111
Table 7-10 Valid Network Ports Combination of Serdes/Rcw
111
Table
112
Table 7-11 UDEV Rules for Network Ports in Linux
113
Build BSP Images
114
Build U-Boot
115
Build Linux Kernel
115
Build ROOTFS
116
Build Misc Firmware
117
Deploy BSP Images
117
Pre-Deployment Steps
117
Deploying BSP Images on nor FLASH
119
Boot
119
Ramboot
120
Norboot
120
Nandboot
121
Nfsboot
122
Usbfatboot and Usbext2Boot
122
Mmcfatboot and Mmcext2Boot
123
Related Documentation
125
Artesyn Embedded Technologies - Embedded Computing Documentation
125
Table A-1 Artesyn Embedded Technologies - Embedded Computing Publications
125
Safety Notes
127
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