Curtiss-Wright SL100 User Manual
Xmc pcie multi-channel mezzanine serial fpdp card
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Summary of Contents for Curtiss-Wright SL100
- Page 1 SL100/SL240 XMC PCIe Multi-Channel Mezzanine Serial FPDP Card User Guide Document No. F-T-MU-S2XMCFEC-A-0-A5...
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Page 3: Table Of Contents
TABLE OF CONTENTS ...................................1 1 FOREWORD ..............................1-4 1.1 EMI Statement ...................................1 2 INTRODUCTION ..............................2-3 2.1 How to Use This Manual ..............................2-4 2.2 Related Information ..............................2-5 2.3 Quality Assurance ...................................1 3 TECHNICAL SUPPORT ..............................3-3 3.1 Ordering Process ...................................1 4 PRODUCT OVERVIEW ..............................4-3 4.1 Overview ..............................4-5... - Page 4 .............................7-5 7.1.3 SL240 XMC with Pluggable Transceivers .............................7-6 7.1.4 XMC Standards ..............................7-10 7.2 Media Interface Specifications .............................7-10 7.2.1 SL100 PCIe Fibre-Optic Media Interface Specifications .............................7-10 7.2.2 SL240 PCIe Fibre-Optic Media Interface Specifications ...................................1 8 APPENDIX B ..............................8-3 8.1 Protocol Overview ..............................8-3...
- Page 5 .............................9-4 9.1.2 Short Wavelength Multimode Fibre-Optic Cables ...................................1 10 APPENDIX D ..............................10-3 10.1 FPDP Overview ..............................10-5 10.2 Terminology ..............................10-6 10.3 Parallel FPDP Theory of Operation .............................10-6 10.3.1 Clock Signals .............................10-6 10.3.2 Data Framing ..............................10-7 10.4 Serial FPDP Theory of Operation ..............................10-8 10.5 Parallel FPDP Signal Timing Copyright 2017...
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Page 9: Foreword
SL240 XMC PCIe Card 1 FOREWORD... - Page 11 All Curtiss-Wright, LinkXchange ® products referred to in this document are protected by one or both of the following U.S. patents 6,751,699 and 5,982,634. Curtiss-Wright, is an Associate Level member of PICMG and as such may use the PICMG and CompactPCI logos.
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Page 12: Emi Statement
FOREWORD 1.1 EMI Statement EMI Statement This product is intended for use in industrial, laboratory or military environments. This product uses and emits electromagnetic radiation, which may interfere with other radio and communication devices. The user may be in violation of FCC regulations if this device is used in other than the intended market environments. -
Page 13: Introduction
SL240 XMC PCIe Card 2 INTRODUCTION... -
Page 15: How To Use This Manual
INTRODUCTION 2.1 How to Use This Manual Purpose This manual introduces the XMC SL240 product. It provides guidance through the process of unpacking, setting up, and programming the cards. Scope This manual contains the following information: An introduction to SL240 XMC. ·... -
Page 16: Related Information
· IEC 825-1984 Radiation Safety of Laser Products, Equipment Classification, Requirements, and User’s Guide, 2 parts, 1993. · FibreXtreme SL100/SL240 Serial FPDP PCIe NSL Software and API Guide (Doc. No. F-T-ML-S2APINSL-A-0). · LinkXchange GLX4000 Physical Layer Switch Hardware Reference Manual (Doc. -
Page 17: Quality Assurance
INTRODUCTION 2.3 Quality Assurance Curtiss-Wright's policy is to provide our customers with the highest quality products and services. In addition to the physical product, the company provides documentation, sales and marketing support, hardware and software technical support, and timely product delivery. Our quality commitment begins with product concept, and continues after receipt of the purchased product. -
Page 19: Technical Support
SL240 XMC PCIe Card 3 TECHNICAL SUPPORT... -
Page 21: Ordering Process
· World Wide Web address: www.cwcdefense.com 3.1 Ordering Process To learn more about Curtiss-Wright's products or to place an order, please use the contact 3333 information above or E-mail: DTN_info@curtisswright.com. Hours of operation are from 8:00 a.m. to 5:00 p.m. Eastern Standard/Daylight Time. -
Page 23: Product Overview
SL240 XMC PCIe Card 4 PRODUCT OVERVIEW... -
Page 25: Overview
Anything that is exclusive to the SL100 XMC PCIe Cards will be described as such. - Page 26 PRODUCT OVERVIEW Figure 4-1 SL240 XMC Quad Channel Card Air Cooled (AC) Figure 4-2 SL240 XMC FC Quad Channel and Rear I/O Conduction Cooled (CC) Cards The Rear I/O version does not have the optical transceivers, shown here as the lower card Copyright 2017 SL240 XMC User Guide...
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Page 27: Xmc Features
PRODUCT OVERVIEW 4.2 XMC Features SL240 XMC PCIe provides reliable highly scalable point-to-point serial I/O connections point-to- point connections broadcast interconnects between systems, with minimal overhead and very low latency. The protocol involved for this transport is based on Fibre Channel, though it is not Fibre Channel compliant. -
Page 28: Sfp Media
The SFP transceivers accept a fiber-optic cable terminated with a Duplex LC style connector, available from most major cable manufacturers. For details concerning these connectors, contact Curtiss-Wright, Technical Support. Figure 4-3 Pluggable (SFP small form factor) Copyright 2017 SL240 XMC User Guide... -
Page 29: Applications
Many other applications are possible in these configurations. The SL240 XMC's applications can be further expanded with the use of additional Curtiss-Wright equipment whose features are also covered in this section. 4.3.1 LinkXchange GLX4000 Physical Layer Switch The GLX4000 Physical Layer Switch is a managed, non-blocking, multipurpose crosspoint switch for digital signals at speeds up to 4.25 gigabits per second (Gbps). -
Page 30: Typical Digital Signal Processing (Dsp) Imaging System
PRODUCT OVERVIEW 4.3.2 Typical Digital Signal Processing (DSP) Imaging System With the support for a 2.5 Gbps link transmission rate between interconnected subsystems, the SL240 XMC PCIe is ideal for use in many of today’s high-throughput data transfer applications. Figure 4-4 shows one example. Figure 4-4 Typical Applications of SL240 XMC in Advanced DSP Systems Copyright 2017 SL240 XMC User Guide... -
Page 31: Extending Fpdp
4.4.1 Typical Topologies There are four typical topologies for the SL240 XMC card. These topologies should cover most customer applications. If another topology is desired contact Curtiss-Wright Technical Support to see if it is possible. The topologies are: · Point-to-point ·... -
Page 32: Point-To-Point
PRODUCT OVERVIEW 4.4.2 Point-to-point The point-to-point topology is the native mode for the SL240 XMC PCIe card. One user option available in this mode is whether flow control is used or not. If flow control is used, the transmitter on each end will not transmit when the remote receiver is telling it to back off or the receive fiber is missing. -
Page 33: Single Master Ring
A switch suitable for this purpose is the LinkXchange GLX4000 Physical Layer Switch, available from Curtiss-Wright. Software controls mastership switching of the ring. There are rules associated with master switching listed in the “Programming Interface”... -
Page 34: Multiple Master Ring
PRODUCT OVERVIEW 4.4.5 Multiple Master Ring This is another form of ring topology, where there are multiple masters on the ring, and these masters have to receive data as well as transmit data to the next master. In the most complex case, each node is a master, which means that it receives data from the previous master and sends data to the next master. -
Page 35: Installation
SL240 XMC PCIe Card 5 INSTALLATION... -
Page 37: Procedural Overview
Any optional equipment is shipped in separate cartons. 5.3 Inspect the Cards The SL240 XMC card consists of a single card with a built-in link interface. If the card was damaged in shipping, notify Curtiss-Wright, or your supplier immediately. Copyright 2017 SL240 XMC User Guide... -
Page 38: Install The Xmc Card
INSTALLATION 5.4 Install the XMC Card WARNING: Turn off all power to your operating system before attempting to install the SL240 XMC PCIe Card. The SL240 XMC PCIe card requires one slot on the host computer. To install the SL240 XMC PCIe card into an available carrier slot, insert the faceplate into the carrier front panel cutout until it butts up against the mating connector, as shown in Figure 5-1, steps 1 and 2. - Page 39 INSTALLATION XMC-compliant carrier manufacturers typically supply the mounting screws that attach the XMC card to the stiffening rib. As a result, no mounting screws are provided with the SL240 XMC card. NOTE: The user must ensure that proper airflow is supplied to the component side of the card.
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Page 40: Connect The Cables
INSTALLATION 5.5 Connect the Cables 5.5.1 Transmission Media For short wavelength laser modules, either a 50 µm or 62.5 µm core diameter cable should be used. For distances up to 300 meters 62.5 µm can be used. 50 µm cable allows distances up to 500 meters. -
Page 41: Troubleshooting
5.6 Troubleshooting If the system does not boot correctly, power down the machine, reseat the card, double-check cable connections, and turn the system back on. If problems persist, contact Curtiss-Wright, Defense Solutions., Technical Support at (800) 252-5601 or DTN_support@ curtisswright.com for assistance. -
Page 43: Operation
SL240 XMC PCIe Card 6 OPERATION... -
Page 45: Overview
OPERATION 6.1 Overview SL240 XMC PCIe cards move data with very low latency between a host interface and a 2.5 Gbps link. The SL240 XMC PCIe version uses 1G SFP optical transceivers and operates in environments where a lower system throughput is acceptable. Both host interface cards must be installed in an 8 x8, x16, or x32 XMC PCIe bus slot. -
Page 46: Transmit Operation
OPERATION 6.2.2 Transmit Operation The transmit operation must first collect data in the transmit FIFO for transmission. This means that either data is PIO’d into the Transmit FIFO or a DMA transaction is set up to fill the FIFO. Once a data word is in the FIFO, transmission can begin. The framing-state machine first checks that there is no data in the retransmit FIFO and that the remote node is not telling this node to back off. -
Page 47: Data Synchronization
There are many different configuration options available, which affect the operation of the SL240 XMC PCIe card. Most of these options are configured through the API. Consult the SL240 (FibreXtreme) Software and API Guide or Contact Curtiss-Wright TechSupport to learn how to set up the options discussed in the following sub-sections. -
Page 48: Loop Enable
OPERATION 6.4.2 Loop Enable The loop-enable option allows the SL240 to transmit the received Serial FPDP data stream again. When loop enable is on, it implies that this node is designated as a receiver in the current configuration. 6.4.3 Receiver/Transmitter Enable The transmitter-enable and receiver-enable settings can turn off the transmit and receive Serial FPDP data streams, respectively. - Page 49 SL240 XMC PCIe Card 7 APPENDIX A...
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Page 51: Specifications
APPENDIX A 7.1 Specifications NOTE: “Peak” current specifications are based on measurements taken while the card was transmitting and receiving large buffers of data. All current requirement measurements were taken on a dual processor 1 GHz system. CAUTION: Power usage is highly system dependent and varies from system to system. 7.1.1 SL240 XMC with Low Rider Trancseivers Physical Dimensions: ............... -
Page 52: Sl240 Xmc Rear Io
APPENDIX A 7.1.2 SL240 XMC Rear IO Physical Dimensions: ............... 74 mm x 143.7 mm (2.915 inches x 5.659 inches) Weightweight: ................. » 0.25 lbs. Operating Voltage: 12 volt supply ..............11.75 V to 12.25 V 3.3 volt supply ............. 3.29 V to 3.35 V Power Dissipation: 12 volt supply ............... -
Page 53: Sl240 Xmc With Pluggable Transceivers
APPENDIX A 7.1.3 SL240 XMC with Pluggable Transceivers Physical Dimensions: ............... 74 mm x 143.7 mm (2.915 inches x 5.659 inches) Weightweight: ................. » 0.25 lbs. Operating Voltage: 12 volt supply ..............11.75 V to 12.25 V 3.3 volt supply ............. 3.29 V to 3.35 V Power Dissipation: 12 volt supply ............... -
Page 54: Xmc Standards
APPENDIX A 7.1.4 XMC Standards The XMC Mezzanine Card base standard defines physical features that enable switched communications between a standard Mezzanine Card and its carrier. These features as applied to the SL240 XMC card include the addition of one connector carrying the additional electrical signals necessary for such communications. - Page 55 APPENDIX A Table A-2 P16 XMC Connector Pin Definition (Rear IO only) R_TX_0+ R_TX_0- R_TX-1+ R_TX_1- R_TX2+ R_TX_2- R_TX_3+ R_TX_3- R_RX_0+ R_RX_0- R_RX_1+ R_RX_1- R_RX_2+ R_RX_2- R+RX_3+ R_RX_3- Copyright 2017 SL240 XMC User Guide...
- Page 56 APPENDIX A IPMI The VITA 42 XMC standard requires that the SL240 XMC card provide hardware definition information within an on board EEPROM that may be read by an external controller using IPMI commands and I2C serial bus transactions. This information is referred to as an FRU record (Field Replaceable Unit).
- Page 57 APPENDIX A Table A-4 Sub-type 1 Device Definition F i e l d L e n g t h D e s c r i p t i o n S u b - t y p e 4 b i t s 1 f o r I2 C d e v i c e d e f i n i t i o n s u b - t y p e Ve r s i o n 4 b i t s...
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Page 58: Media Interface Specifications
APPENDIX A 7.2 Media Interface Specifications 7.2.1 SL100 PCIe Fibre-Optic Media Interface Specifications Connector: ............. Duplex LC 850 nm: Media ............50 µm or 62.5 µm multimode fiber Fiber Channel Formats: ........100-M5-SN-1 (1 Gbps, 50 µm fiber) 100-M6-SN-1 (1 Gbps, 62.5 µm fiber) Maximum Fiber Length: ........ - Page 59 SL240 XMC PCIe Card 8 APPENDIX B...
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Page 61: Protocol Overview
8.1 Protocol Overview NOTE:The SL100/SL240 XMC PCIe Cards will be referred to throughout this appendix as SL240 XMC PCIe. Anything that is exclusive to the SL100 XMC PCIe Cards will be described as such. The SL240's XMC PCIe Serial FPDP protocol (also known as VITA 17.) is designed to provide near optimal throughput while maintaining low overhead. - Page 62 APPENDIX B Table B-1 Mapping Fibre Channel Ordered Sets onto the VITA 17.1 Ordered Sets Description Fibre Channel VITA 17.1 Ordered Ordered Set Start of Frame: SOFc1 PIO1 = 0, PIO2 = 0, DIR = 0 Start of Frame: SOFi1 PIO1 = 0, PIO2 = 0, DIR = 1 Start of Frame: SOFn1...
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Page 63: Frames
APPENDIX B 8.3 Frames There are four basic frame types defined in VITA 17.1 – an IDLE frame, data frame, a SYNC without data frame, and a SYNC with data frame. The data is divided into frames so the FPDP signals are sampled at some minimum interval, and so the receiver is guaranteed to see IDLEs to maintain synchronization. -
Page 64: Link Bandwidth
APPENDIX B 8.3.1 Link Bandwidth With CRC disabled and the Copy Mode Master bit clear (‘0’), there is a five-word overhead for every frame transmitted. Since frames can contain up to 512 words of data, this results in an efficiency of 99.03%. With CRC enabled and the Copy Master bit clear, there is a six-word overhead for every frame transmitted. -
Page 65: Data Transmission And Flow Control
Data is only inserted if the flow control signal from the remote end is GO—if it is STOP, then the data waits in the Transmit FIFO until the signal changes. Curtiss-Wright’ SL240s use the same protocol when transmitting from either end to allow the link to operate bi-directionally. Since these data streams are independent, the maximum throughput on the link would be 494 MB/s (247 MB/s/direction) for SL240. - Page 67 SL240 XMC PCIe Card 9 APPENDIX C...
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Page 69: Ordering Information
APPENDIX C 9.1 Ordering Information This appendix contains the order numbers for Curtiss-Wright products mentioned in this manual. For an up to date list, or for inquiries about these products, contact Curtiss-Wright Defense Solutions Center Sales. 9.1.1 SL240 PCIe Multi-channel Board... -
Page 70: Short Wavelength Multimode Fibre-Optic Cables
APPENDIX C FHB7-XE4P6B04-CC SL240 XMC 2.5 Gbs Data Link Card, Quad Channel, Bi-Directional, 3.3v, Rear IO, Conduction Cooled. 9.1.2 Short Wavelength Multimode Fibre-Optic Cables The following table lists the order numbers for the simplex and duplex, 50/125 mm multimode fiber-optic cables, for use with the short wavelength laser media interface. Table C-3 LC to LC Simplex Duplex... - Page 71 SL240 XMC PCIe Card 10 APPENDIX D...
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Page 73: Fpdp Overview
APPENDIX D 10.1 FPDP Overview This section provides a brief discussion of Front Panel Data Port (FPDP). For more information about FPDP, refer to Front Panel Data Port Specifications, ANSI/VITA 17-1998 or go to the VITA website at: www.vita.com/vso/. The SL240 XMC PCIe cards implement a serial version of FPDP on their link interface, which is standard VITA 17.1VITA 17.1. - Page 74 APPENDIX D Figure D-1 Example Configuration With Multiple VME FPDP Cards Connected\ Copyright 2017 SL240 XMC User Guide 10-4...
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Page 75: Terminology
APPENDIX D Several advantages of an FPDP interface include: Simple hardware is required to interface to FPDP. · FPDP does not interfere with the normal bus operations—VME or PCI traffic can · continue without data transfers wasting bus bandwidth. No bus contention is possible because there is only one transmitter. ·... -
Page 76: Parallel Fpdp Theory Of Operation
APPENDIX D 10.3 Parallel FPDP Theory of Operation 10.3.1 Clock Signals A single FPDP-TM generates a free-running clock. This clock frequency determines the maximum transfer rate on the bus. FPDP provides both a PECL (Positive Emitter Coupled Logic) and TTL strobe on the bus, with the PECL clock used for higher frequency (> 20 MHz) transfers. -
Page 77: Serial Fpdp Theory Of Operation
APPENDIX D FIXED SIZE REPEATING FRAME DATA Synchronization must occur prior to data to which it applies. · Synchronization occurs at the same time the last data word in the block before is · transferred. /SYNC must be asserted at the end of the data block while /DVALID is still asserted. ·... -
Page 78: Parallel Fpdp Signal Timing
APPENDIX D 10.5 Parallel FPDP Signal Timing Figure D-2 shows the timing for several FPDP interface signals. This figure is accurate for all four data framing types. See Appendix D for a discussion of framing. The Data Valid signal, / DVALID, is asserted by the FPDP-TM when valid data is transmitted onto the FPDP bus but not before at least 16 STROBE periods have occurred. - Page 79 APPENDIX D Figure D-2 Parallel FPDP Interface Timing Diagram Copyright 2017 SL240 XMC User Guide 10-9...
- Page 80 APPENDIX D Figure D-3 FPDP Timing Diagrams Showing the Use of Framing The timing parameters from Figure D-2 and D-3 are detailed in Table D-1 and D-2. These timing specifications are taken from Front Panel Data Port Specifications, ANSI/VITA 17. Copyright 2017 SL240 XMC User Guide 10-10...
- Page 81 APPENDIX D Table D-1 Parallel FPDP Timing Specifications Parameter Description At Transmitter At Receiver FPDP End of Cable End of Cable Clock Used Data, /DVALID, / 6.0 ns min. 5.0 ns min. SYNC setup time Data, /DVALID, / 5.5 ns min. 4.5 ns min.
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