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Curtiss-Wright FibreXtreme SL100 User Manual

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FibreXtreme
SL100/SL240 Multi-Channel
PCIe
User Guide
Document No. F-T-MU-S2PCIENF-A-0-A3

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Summary of Contents for Curtiss-Wright FibreXtreme SL100

  • Page 1 FibreXtreme SL100/SL240 Multi-Channel PCIe User Guide Document No. F-T-MU-S2PCIENF-A-0-A3...

  • Page 3: Table Of Contents

    TABLE OF CONTENTS ...................................1 1 FOREWORD ..............................1-4 1.1 EMI Statement ...................................1 2 INTRODUCTION ..............................2-3 2.1 How to Use This Manual ..............................2-4 2.2 Related Information ..............................2-5 2.3 Quality Assurance ...................................1 3 TECHNICAL SUPPORT ..............................3-3 3.1 Ordering Process ...................................1 4 PRODUCT OVERVIEW ..............................4-3 4.1 Overview ..............................4-4...
  • Page 4 ...................................1 6 OPERATION ..............................6-3 6.1 Overview ..............................6-3 6.2 Theory of Operation .............................6-3 6.2.1 Receive Operation .............................6-4 6.2.2 Transmit Operation .............................6-4 6.2.3 Loop Operation ..............................6-5 6.3 Data Synchronization ..............................6-5 6.4 Configuration Options .............................6-5 6.4.1 Flow Control .............................6-6 6.4.2 Loop Enable .............................6-6 6.4.3 Receiver/Transmitter Enable .............................6-6 6.4.4 CRC Generation/Checking...
  • Page 5 .............................10-6 10.3.1 Clock Signals .............................10-6 10.3.2 Data Framing ..............................10-7 10.4 Serial FPDP Theory of Operation ..............................10-8 10.5 Parallel FPDP Signal Timing Copyright 2017 FibreXtreme User Guide...

  • Page 7: Foreword

    SL100/SL240 1 FOREWORD...
  • Page 9 All Curtiss-Wright, LinkXchange ® products referred to in this document are protected by one or both of the following U.S. patents 6,751,699 and 5,982,634. Curtiss-Wright, is an Associate Level member of PICMG and as such may use the PICMG and CompactPCI logos.

  • Page 10: Emi Statement

    FOREWORD 1.1 EMI Statement EMI Statement This product is intended for use in industrial, laboratory or military environments. This product uses and emits electromagnetic radiation, which may interfere with other radio and communication devices. The user may be in violation of FCC regulations if this device is used in other than the intended market environments.

  • Page 11: Introduction

    SL100/SL240 2 INTRODUCTION...

  • Page 13: How To Use This Manual

    This manual introduces the FibreXtreme SL240 PCI-Express (PCIe) card. It provides guidance through the process of unpacking, setting up, and programming the cards. NOTE: Both the FibreXtreme SL100 and SL240 hardware are referred to throughout this manual as SL240. The software that supports both the SL100 and SL240 hardware is referred to as SL240, including the driver and API.

  • Page 14: Related Information

    · IEC 825-1984 Radiation Safety of Laser Products, Equipment Classification, Requirements, and User’s Guide, 2 parts, 1993. · FibreXtreme SL100/SL240 Serial FPDP PCIe NSL Software and API Guide (Doc. No. F-T-ML-S2APINSL-A-0). · LinkXchange GLX4000 Physical Layer Switch Hardware Reference Manual (Doc.

  • Page 15: Quality Assurance

    INTRODUCTION 2.3 Quality Assurance Curtiss-Wright's policy is to provide our customers with the highest quality products and services. In addition to the physical product, the company provides documentation, sales and marketing support, hardware and software technical support, and timely product delivery. Our quality commitment begins with product concept, and continues after receipt of the purchased product.

  • Page 17: Technical Support

    SL100/SL240 3 TECHNICAL SUPPORT...

  • Page 19: Ordering Process

    World Wide Web address: www.cwcdefense.com 3.1 Ordering Process 3333 To learn more about Curtiss-Wright's products or to place an order, please use the contact information above or E-mail: DTN_info@curtisswright.com. Hours of operation are from 8:00 a.m. to 5:00 p.m. Eastern Standard/Daylight Time.

  • Page 21: Product Overview

    SL100/SL240 4 PRODUCT OVERVIEW...

  • Page 23: Overview

    It incorporates many of the advanced protocol features in PCI Express such as Automatic Lane Reversal. The SL240 PCIe can interoperate with Curtiss-Wright’s existing FibreXtreme family of products. These products include PCI, PCI Mezzanine (PMC), and a rehostable Common Mezzanine Card (CMC).

  • Page 24: Sl240 Pcie Features

    PRODUCT OVERVIEW 4.2 SL240 PCIe Features SL240 PCIe provides reliable highly scalable point-to-point serial I/O interconnects between systems, with minimal overhead and very low latency. The protocol involved for this transport is based on Fibre Channel, though it is not Fibre Channel compliant. The SL240 PCIe cards incorporate the functionality of four independent Serial FPDP 5 Gbps channels on a single Host Bus Adapter (HBA).

  • Page 25: Sfp Media

    Many other applications are possible in these configurations. The SL240’s applications can be further expanded with the use of additional Curtiss-Wright equipment whose features are also covered in this section. 4.3.1 Typical Digital Signal Processing (DSP) Imaging System With the support for a 2.5 Gbps link transmission rate between interconnected subsystems, the...
  • Page 26 PRODUCT OVERVIEW Figure 2-2 Typical Applications of FibreXtreme SL240 PCIe in Advanced DSP Systems Copyright 2017 FibreXtreme User Guide...

  • Page 27: Extending Fpdp

    4.4.1 Typical Topologies There are four typical topologies for the SL240 PCIe card. These topologies should cover most customer applications, if another topology is desired contact Curtiss-Wright Technical Support to see if it is possible. The topologies are: · Point-to-point ·...

  • Page 28: Point-To-Point

    PRODUCT OVERVIEW 4.4.2 Point-to-point The point-to-point topology is the native mode for the SL240 PCIe card. One user option available in this mode is whether flow control is used or not. If flow control is used, the transmitter on each end will not transmit when the remote receiver is telling it to back off or the receive fiber is missing.

  • Page 29: Single Master Ring

    A switch suitable for this purpose is the LinkXchange GLX4000 Physical Layer Switch, available from Curtiss-Wright Software controls mastership switching of the ring. There are rules associated with master switching listed in the “Programming Interface”...

  • Page 30: Multiple Master Ring

    PRODUCT OVERVIEW 4.4.5 Multiple Master Ring This is another form of ring topology, where there are multiple masters on the ring, and these masters have to receive data as well as transmit data to the next master. In the most complex case, each node is a master, which means that it receives data from the previous master and sends data to the next master.

  • Page 31: Installation

    SL100/SL240 5 INSTALLATION...

  • Page 33: Overview

    5.3 Inspect the Cards The SL240 PCIe card consists of a single card with a built-in link interface. If the card was damaged in shipping, notify Curtiss-Wright, or your supplier immediately. 5.4 Install the SL240 PCIe Card WARNING: Turn off all power to your operating system before attempting to install the SL240 PCIe Card.
  • Page 34 INSTALLATION To install the SL240 PCIe card, push the card into an available X8, X16, or x32 PCIe slot on the motherboard as shown in Figure 5-1 step 1 and 2, until it is firmly seated. Install the mounting screw as shown in step 3. NOTE: The SL240 PCIe requires an x8 PCIe bus slot for proper operation.

  • Page 35: Connect The Cables

    INSTALLATION 5.5 Connect the Cables 5.5.1 Transmission Media For short wavelength laser modules, either a 50 µm or 62.5 µm core diameter cable should be used. For distances up to 300 meters 62.5 µm can be used. 50 µm cable allows distances up to 500 meters.

  • Page 36: Troubleshooting

    5.6 Troubleshooting If the system does not boot correctly, power down the machine, reseat the card, double-check cable connections, and turn the system back on. If problems persist, contact Curtiss-Wright, Defense Solutions., Technical Support at (800) 252-5601 or DTN_support@ curtisswright.com for assistance.

  • Page 37: Operation

    SL100/SL240 6 OPERATION...

  • Page 39: Overview

    OPERATION 6.1 Overview SL240 PCIe cards move data with very low latency between a host interface and a 5 Gbps link. The SL100 PCIe version uses 1G SFP optical transceivers and operates in environments where a lower system throughput is acceptable. Both cards must be installed in an x8, x16, or x32 PCIe bus slot.

  • Page 40: Transmit Operation

    OPERATION 6.2.2 Transmit Operation The transmit operation must first collect data in the transmit FIFO for transmission. This means that either data is PIO’d into the Transmit FIFO or a DMA transaction is set up to fill the FIFO. Once a data word is in the FIFO, transmission can begin. The framing-state machine first checks that there is no data in the retransmit FIFO and that the remote node is not telling this node to back off.

  • Page 41: Data Synchronization

    OPERATION Note that NRDY as a Serial FPDP signal has no direct impact on the operation of the link logic. Rather, NRDY is passed through the link logic and its function is dependent on the respective host interface. The Serial FPDP flow control (implemented via suspend requests which are also known as STOP ordered sets) is used by the link logic and does not directly affect the interface between the link logic and host interface.

  • Page 42: Loop Enable

    OPERATION 6.4.2 Loop Enable The loop-enable option allows the SL240 PCIe card to transmit the received Serial FPDP data stream again. When loop enable is on, it implies that this node is designated as a receiver in the current configuration. 6.4.3 Receiver/Transmitter Enable The transmitter-enable and receiver-enable settings can turn off the transmit and receive Serial FPDP data streams, respectively.
  • Page 43 SL100/SL240 7 APPENDIX A...

  • Page 45: Specifications

    APPENDIX A 7.1 Specifications NOTE: “Peak” current specifications are based on measurements taken while the card was transmitting and receiving large buffers of data. All current requirement measurements were taken on a Quad core processor 3.4 GHz system. CAUTION: Power usage is highly system dependent and varies from system to system. 7.1.1 SL240 PCIe Specifications Physical Dimensions: 174.6 mm x 106.7 mm...

  • Page 46: Media Interface Specifications

    APPENDIX A 7.2 Media Interface Specifications 7.2.1 SL100 PCIe Fibre-Optic Media Interface Specifications Connector: ............. Duplex LC 850 nm: Media ............50 µm or 62.5 µm multimode fiber Fiber Channel Formats: ........100-M5-SN-1 (1 Gbps, 50 µm fiber) 100-M6-SN-1 (1 Gbps, 62.5 µm fiber) Maximum Fiber Length: ........
  • Page 47 SL100/SL240 8 APPENDIX B...

  • Page 49: Overview

    APPENDIX B 8.1 Overview NOTE: The FibreXtreme SL100 and SL240 PCIe Cards will be referred to throughout this appendix as SL240 PCIe. Anything that is exclusive to the SL100 PCIe Cards will be described as such. The SL240 PCIe Serial FPDP protocol (also known as VITA 17.1) is designed to provide near optimal throughput while maintaining low overhead.
  • Page 50 APPENDIX B Table 6-1 Mapping Fibre Channel Ordered Sets onto the VITA 17.1 Ordered Sets Fibre Channel VITA 17.1 Ordered Description Ordered Set Start of Frame: SOFc1 PIO1 = 0, PIO2 = 0, DIR = 0 Start of Frame: SOFi1 PIO1 = 0, PIO2 = 0, DIR = 1 Start of Frame: SOFn1...

  • Page 51: Frames

    APPENDIX B 8.3 Frames There are four basic frame types defined in VITA 17.1 – an IDLE frame, data frame, a SYNC without data frame, and a SYNC with data frame. The data is divided into frames so the FPDP signals are sampled at some minimum interval, and so the receiver is guaranteed to see IDLEs to maintain synchronization.

  • Page 52: Link Bandwidth

    APPENDIX B 8.3.1 Link Bandwidth With CRC disabled and the Copy Mode Master bit clear (‘0’), there is a five-word overhead for every frame transmitted. Since frames can contain up to 512 words of data, this results in an efficiency of 99.03%. With CRC enabled and the Copy Master bit clear, there is a six-word overhead for every frame transmitted.

  • Page 53: Data Transmission And Flow Control

    Data is only inserted if the flow control signal from the remote end is GO—if it is STOP, then the data waits in the Transmit FIFO until the signal changes. Curtiss-Wright’ SL240 PCIe cards use the same protocol when transmitting from either end to allow the link to operate bi-directionally.
  • Page 55 SL100/SL240 9 APPENDIX C...

  • Page 57: Ordering Information

    APPENDIX C 9.1 Ordering Information This appendix contains the order numbers for Curtiss-Wright products mentioned in this manual. For an up to date list, or for inquiries about these products, contact Curtiss-Wright Defense Solutions Center Sales. 9.1.1 SL100/SL240 PCIe Multi-channel Board...

  • Page 58: Short Wavelength Multimode Fibre-Optic Cables

    APPENDIX C 9.1.2 Short Wavelength Multimode Fibre-Optic Cables The following table lists the order numbers for the simplex and duplex, 50/125 mm multimode fiber-optic cables, for use with the short wavelength laser media interface. Table 7-2 LC to LC Simplex Duplex Length Cable End 1...
  • Page 59 SL100/SL240 10 APPENDIX D...

  • Page 61: Fpdp Information

    APPENDIX D 10.1 FPDP Information This section provides a brief discussion of Front Panel Data Port (FPDP). For more information about FPDP, refer to Front Panel Data Port Specifications, ANSI/VITA 17-1998 or go to the VITA website at: www.vita.com/vso/. The SL240 PCIe cards implement a serial version of FPDP on their link interface, which is standard VITA 17.1.
  • Page 62 APPENDIX D Figure 8-1 Example Configuration With Multiple VME FPDP Cards Connected\ Copyright 2017 FibreXtreme User Guide 10-4...

  • Page 63: Terminology

    APPENDIX D Several advantages of an FPDP interface include: · Simple hardware is required to interface to FPDP. · FPDP does not interfere with the normal bus operations—VME or PCI traffic can continue without data transfers wasting bus bandwidth. · No bus contention is possible because there is only one transmitter.

  • Page 64: Parallel Fpdp Theory Of Operation

    APPENDIX D 10.3 Parallel FPDP Theory of Operation 10.3.1 Clock Signals A single FPDP-TM generates a free-running clock. This clock frequency determines the maximum transfer rate on the bus. FPDP provides both a PECL (Positive Emitter Coupled Logic) and TTL strobe on the bus, with the PECL clock used for higher frequency (> 20 MHz) transfers.

  • Page 65: Serial Fpdp Theory Of Operation

    APPENDIX D FIXED SIZE REPEATING FRAME DATA · Synchronization must occur prior to data to which it applies. · Synchronization occurs at the same time the last data word in the block before is transferred. · /SYNC must be asserted at the end of the data block while /DVALID is still asserted. ·...

  • Page 66: Parallel Fpdp Signal Timing

    APPENDIX D 10.5 Parallel FPDP Signal Timing Figure 8-2 shows the timing for several FPDP interface signals. This figure is accurate for all four data framing types. See section 8.3.2 for a discussion of framing. The Data Valid signal, / DVALID, is asserted by the FPDP-TM when valid data is transmitted onto the FPDP bus but not before at least 16 STROBE periods have occurred.
  • Page 67 APPENDIX D Figure 8-2 Parallel FPDP Interface Timing Diagram Copyright 2017 FibreXtreme User Guide 10-9...
  • Page 68 APPENDIX D Figure 8-3 FPDP Timing Diagrams Showing the Use of Framing The timing parameters from Figure 8-2 and D-3 are detailed in Table 8-1 and D-2. These timing specifications are taken from Front Panel Data Port Specifications, ANSI/VITA 17. Copyright 2017 FibreXtreme User Guide 10-10...
  • Page 69 APPENDIX D Table 8-1 Parallel FPDP Timing Specifications Parameter Description At Transmitter At Receiver FPDP End of Cable End of Cable Clock Used Data, /DVALID, / 6.0 ns min. 5.0 ns min. SYNC setup time Data, /DVALID, / 5.5 ns min. 4.5 ns min.
  • Page 71 INDEX Index - E - efficiency 8-6 - 3 - encoding 4-4 EOF 8-3 3U 4-3 - F - - 6 - fiber-optic 5-3 FIFO 4-9, 6-3 6U 4-3 flow control 4-8 FPDP 4-4, 4-7, 4-9 - A - frames 8-5 anti-static 5-3 - H - auto-negotiate 4-4...
  • Page 72 INDEX - O - - W - overload 6-5 Wavelength 5-5, 5-5, 7-4 - P - payload 4-4 PCIe 4-3, 4-5 PIO 6-3 PIO1 6-3 - R - receivers 5-5 rings 4-10 - S - scalable 4-3, 4-4 SEOF 8-3 SFP 4-4 slot 5-3 Small Form 4-4...

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