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Curtiss-Wright FibreXtreme SL240 Hardware Reference Manual

Conduction cooled pmc cards
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SL240
Hardware Reference
for Conduction Cooled PMC Cards
Document No. F-T-MR-S2PMCCC#-A-0-A4

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Summary of Contents for Curtiss-Wright FibreXtreme SL240

  • Page 1  SL240 Hardware Reference for Conduction Cooled PMC Cards Document No. F-T-MR-S2PMCCC#-A-0-A4...
  • Page 3 Curtiss-Wright Controls, Inc. reserves the right to make changes without notice. Curtiss-Wright Controls, Inc. makes no warranty of any kind with regard to this printed material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose.
  • Page 4 This product is intended for use in industrial, laboratory, or military environments. This product uses and emits electromagnetic radiation, which may interfere with other radio and communication devices. The user may be in violation of FCC regulations if this device is used in other than the intended market environments.

  • Page 5: Table Of Contents

    TABLE OF CONTENTS 1. INTRODUCTION............................1-1 1.1 How to Use This Manual......................1-1 1.1.1 Purpose ........................1-1 1.1.2 Scope ........................1-1 1.1.3 Style Conventions....................1-1 1.2 Related Information........................1-2 1.3 Quality Assurance ........................1-3 1.4 Technical Support........................1-4 1.5 Ordering Process ........................1-4 2.
  • Page 6 Figure 2-1 SL240 Conduction Cooled PMC Card ..................2-2 Figure 2-2 SL240 CCPMC LEDs LU, LS, R1, R0, T1, and T0 ..............2-4 Figure 2-3 Typical Applications of FibreXtreme SL240 in Advanced DSP Systems ........2-6 Figure 2-4 FibreXtreme SL240 Extending FPDP................... 2-7 Figure 2-5 Point-to-Point Topology .......................

  • Page 7: Introduction

    1. INTRODUCTION 1.1 How to Use This Manual 1.1.1 Purpose This manual introduces the FibreXtreme SL240 family of products, and provides guidance through the process of unpacking, setting up, and programming the cards. 1.1.2 Scope This manual contains the following information: •...

  • Page 8: Related Information

    IEC 825-1984 Radiation Safety of Laser Products, Equipment Classification, Requirements, and User’s Guide, 2 parts, 1993. • LinkXchange LX2500 Physical Layer Switch Hardware Reference Manual (Doc. No. F-T-MR-LX2500), Curtiss-Wright Controls, Inc. • LinkXchange GLX4000 Physical Layer Switch User Reference Manual (Doc. No. F-T- MR-L5XL144#-A-0-A2), Curtiss-Wright Controls, Inc.

  • Page 9: Quality Assurance

    INTRODUCTION 1.3 Quality Assurance Curtiss-Wright Controls’ policy is to provide our customers with the highest quality products and services. In addition to the physical product, the company provides documentation, sales and marketing support, hardware and software technical support, and timely product delivery.

  • Page 10: Technical Support

    World Wide Web address: www.cwcembedded.com 1.5 Ordering Process To learn more about Curtiss-Wright Controls, Inc. products or to place an order, please use the following contact information. Hours of operation are from 8:00 a.m. to 5:00 p.m. Eastern Standard/Daylight Time.

  • Page 11: Product Overview

    PRODUCT OVERVIEW 2. PRODUCT OVERVIEW 2.1 Overview The FibreXtreme SL240 cards provide fast, low latency point-to-point or broadcast connections between sensors and processing devices. Curtiss-Wright Controls’ SL240 family of products includes Conduction Cooled PCI Mezzanine (CCPMC), PMC, PCI, CompactPCI (CPCI) and Front Panel Data Port (FPDP) solutions. The FPDP versions are in two categories—a 6U VME- or PCI-based solution with standard FPDP connectors,...

  • Page 12: Sl240 Features

    It is also suited for short reach intersystem connections (< = 150 m). All cards use a Duplex LC style connector available from most major cable manufacturers. For details concerning these connectors, contact Curtiss-Wright Controls, Inc. Technical Support.

  • Page 13: Led Descriptions

    PRODUCT OVERVIEW 2.2.2 LED Descriptions Three sets of status LEDs are visible on the SL240 board. The position of the LEDs is shown in Figure 2-2 for the CCPMC SL240. Link Select (LS) The Link Select LED indicates which channel of the SL240 board is selected. By default channel 1 is selected.

  • Page 14: Accessories

    Can be connected to a modem and controlled from a remote location. For more detailed information regarding LX2500 features and operation, contact Curtiss-Wright Controls, Inc. and request a copy of the LinkXchange LX2500 Physical Layer Switch Hardware Reference Manual or visit our web site.

  • Page 15: Applications

    High Speed Storage FULL FC-4 FIBRE CHANNEL IS GOOD FOR STORAGE & WORKSTATION CONNECTIONS BUT, TOO MUCH OVERHEAD & LATENCY FOR MOST SENSOR CONNECTIONS ! Figure 2-3 Typical Applications of FibreXtreme SL240 in Advanced DSP Systems Copyright 2006 FibreXtreme Hardware Reference Manual...

  • Page 16: Extending Fpdp

    2.4.2 Extending FPDP The maximum allowable length for FPDP cables ranges from 1 m to 5 m depending upon its configuration. The FibreXtreme SL240 system provides a communication link that extends the reach of FPDP while retaining simplicity, high bandwidth, and reliability.

  • Page 17: Topologies

    2.5.1 Typical Topologies There are four typical topologies for the SL240 card. These topologies should cover most customer applications, though if another topology is desired contact Curtiss-Wright Controls, Inc. Technical Support to see if it is possible. The topologies are: •...

  • Page 18: Chained

    PRODUCT OVERVIEW 2.5.3 Chained This topology is a single transmitter on the end of a long string of receivers. No flow control is available in this topology, and the distance between the nodes is limited only by the transceivers used (150 m maximum). This topology is good for broadcasting data to multiple destinations where late data is of no use, such as video transmission applications.

  • Page 19: Single Master Ring

    FIFO, it should be switched out to avoid bringing down the loop. Switches suitable for this purpose are the LinkXchange LX2500 or GLX4000 Physical Layer Switch, available from Curtiss-Wright Controls, Inc. Software controls mastership switching of the ring. There are rules associated with master switching listed in the “Programming Interface”...

  • Page 20: Multiple Master Ring

    PRODUCT OVERVIEW 2.5.5 Multiple Master Ring This is another form of ring topology, where there are multiple masters on the ring, and these masters have to receive data as well as transmit data to the next master. In the most complex case, each node is a master, which means that it receives data from the previous master and sends data to the next master.

  • Page 21: Installation

    3.3 Inspect the Cards The SL240 card consists of a single card with a built-in link interface. If the card was damaged in shipping, notify Curtiss-Wright Controls, Inc. or your supplier immediately. 3.3.1 SL240 CCPMC Card To install the SL240 CCPMC card, insert the card into an available slot by lining up the three PMC connectors on each board.

  • Page 22: Connect The Cables

    INSTALLATION 3.4 Connect the Cables 3.4.1 Transmission Media For short wavelength laser modules, either a 50 µm or 62.5 µm core diameter cable should be used. For distances up to 125 meters 62.5 µm can be used. 50 µm cable allows distances up to 150 meters.

  • Page 23: Troubleshooting

    If the system does not boot correctly, power down the machine, reseat the card, double- check cable connections, and turn the system back on. If problems persist, contact Curtiss-Wright Controls, Inc. Technical Support at (800) 252-5601 or DTN_support@ curtisswright.com for assistance.
  • Page 24 INSTALLATION This page intentionally left blank Copyright 2006 FibreXtreme Hardware Reference Manual...

  • Page 25: Operation

    4. OPERATION 4.1 Overview SL240 cards move data with very low latency between a host interface and a 2.5 Gbps link, respectively. The host interfaces available are an FPDP-like proprietary interface and a PCI interface. The advantage of the FPDP-like interface is that it requires very simplistic hardware to interface.

  • Page 26: Theory Of Operation

    OPERATION 4.2 Theory of Operation The operation of SL240 cards is simple—take data from the host bus interface and transmit it across a link, or take data from the link and pass it to the host bus interface. The link protocol involved is kept minimal to reduce the latency and improve throughput, while still providing a set of useful features with which to customize your applications.

  • Page 27: Loop Operation

    4.2.3 Loop Operation In the Loop Operation discussion below, SL240 is used generically to refer to any Curtiss-Wright Controls, Inc. SL240 card (PCI, PMC, CPCI, or CMC). Anything that applies to only a specific SL240 product will be noted as such.

  • Page 28: Data Synchronization

    In some rare cases, flow control is not desirable. In these cases, very careful system planning is required, which should be confirmed with Curtiss-Wright Controls, Inc. prior to architectural finalization. One possible exception is for applications that cannot use a duplex fiber-optic link, which means status information (link up and state of flow control) is not available from the remote node.

  • Page 29: Receiver/Transmitter Enable

    OPERATION 4.4.3 Receiver/Transmitter Enable The transmitter-enable and receiver-enable bits in the Link Control register turn off the transmit and receive Serial FPDP data streams, respectively. Neither affects the loop operation, so data will still be retransmitted if the loop operation is enabled. This makes these options useful for record/playback systems where you wish to merely retransmit the data received without processing it.
  • Page 30 OPERATION This page intentionally left blank Copyright 2006 FibreXtreme Hardware Reference Manual...
  • Page 31 A. A - SPECIFICATIONS APPENDIX A SPECIFICATIONS TABLE OF CONTENTS A.1 Specifications ............................A-1 A.1.1 66 MHz CCPMC Specifications..................A-1 A.2 Ruggedized PMC Environmental Specifications ................... A-1 A.2.1 Rugged Level 2 ........................A-1 A.3 Media Interface Specifications....................... A-2 A.3.1 SL240 Fibre-Optic Media Interface Specifications ............. A-2...

  • Page 33: Appendix A - Specifications

    SPECIFICATIONS A.1 Specifications NOTE: “Peak” current specifications are based on measurements taken while the card was transmitting and receiving large buffers of data. CAUTION: Power usage is highly system dependent and varies from system to system. A.1.1 66 MHz CCPMC Specifications Physical Dimensions:.........
  • Page 34 SPECIFICATIONS Random ..........1 g 10 Hz to 2 kHz -6 dB/octave 1 kHz to 2 kHz Shock........... 30 g peak ½ sine wave 11 ms duration Conformal Coating......Acrylic HumiSeal 1B31* Ruggedized cards are coated with HumiSeal 1B31 acrylic conformal coating. This coating is qualified to MIL-I-46058C, Type AR.
  • Page 35 B. REGISTER SET APPENDIX B REGISTER SET TABLE OF CONTENTS B.1 Overview ..............................B-1 B.2 Accessible resources..........................B-1 B.3 PCI Configuration registers........................B-1 B.4 Runtime Register set ..........................B-1 B.4.1 Bit Definitions ........................B-1 B.4.2 Interrupt CSR (INT_CSR) – Offset 0x00 ................B-3 B.4.3 Board CSR (BRD_CSR) – Offset 0x04................B-4 B.4.4 Link Control (LINK_CTL) –...

  • Page 37: Overview

    REGISTER SET B.1 Overview NOTE: The FibreXtreme SL240 PCI, PMC, and CPCI Cards will be referred to throughout this appendix as PMC. Anything that is exclusive to the PCI, PMC, or CPCI Cards will be described as such. The PCI SL240 card is very easy to program. With minimal programming, the PCI SL240 card can transfer data between PCI hosts.
  • Page 38 REGISTER SET Table B-1 SL240 Register Layout REGISTER LAYOUT 0x00 Board CSR Interrupt CSR 0x08 Link Status Link Control 0x10 Receive FIFO Threshold FPDP Flags 0x18 Reserved Laser Transmitter Control 0x20 Reserved Queue Address 0 0x28 Reserved Queue Control 0 0x30 Transaction Length 0 Transaction CSR 0...

  • Page 39: Interrupt Csr (Int_Csr) - Offset 0X00

    REGISTER SET B.4.2 Interrupt CSR (INT_CSR) – Offset 0x00 Field Description Access Reset Value Transaction Channel 0 Interrupt Active – A ‘1’ indicates R/WOC active, a ‘0’ indicates not active. Write ‘1’ to clear. Transaction Channel 1 Interrupt Active – A ‘1’ indicates R/WOC active, a ‘0’...

  • Page 40: Board Csr (Brd_Csr) - Offset 0X04

    REGISTER SET B.4.3 Board CSR (BRD_CSR) – Offset 0x04 Field Description Access Reset Value Little Endian – Set to ‘1’ for unswapped control registers. Setting to ‘0’ has no effect. Reset – Write ‘1’ to reset the board. Writing ‘0’ has no effect.

  • Page 41: Link Control (Link_Ctl) - Offset 0X08

    In these cases, very careful system planning is required, which should be confirmed with Curtiss-Wright Controls, Inc. prior to architectural finalization. One possible exception is for applications that cannot utilize a duplex fiber optic link, which means status information (link up and state of flow control) is not available from the remote node.
  • Page 42 REGISTER SET Field Description Access Reset Value stopped. SYNC as D0 – If ‘1’ then bit 0 of the data stream is used as /SYNC in the outgoing and incoming data stream. If ‘0’, bit 0 is not used as /SYNC. Reserved None Disable Receiver –...
  • Page 43 REGISTER SET Field Description Access Reset Value ordered set per fiber frame. All receivers in the loop or chain should have this bit set to '0.' Do not set this bit to '1' on any device in a point-to-point topology (i.e. two cards) because throughput will decrease by a factor related to frame size.

  • Page 44: Link Status (Link_Stat) - Offset 0X0C

    REGISTER SET B.4.5 Link Status (LINK_STAT) – Offset 0x0C Field Description Access Reset Value 7 to 0 8B10B Errors – 8-bit counter counting the current 0x00 number of 8B10B decoding errors discovered. Cleared through ‘Reset SR’ in LINK_CTL Link Down – A ‘1’ indicates the link has gone down at some point since the last ‘Reset SR’.

  • Page 45: Fpdp Flags (Fpdp_Flgs) - Offset 0X10

    REGISTER SET B.4.6 FPDP Flags (FPDP_FLGS) – Offset 0x10 Field Description Access Reset Value Send SYNC – Write ‘1’ to send SYNC without DVALID. Writing ‘0’ has no effect. PIO1 Out – State of the PIO1 line sent across the link. PIO2 Out –...

  • Page 46: Receive Fifo Threshold - Offset 0X14

    REGISTER SET B.4.7 Receive FIFO Threshold – Offset 0x14 Field Description Access Reset Value 19 to 0 Number of 32-bit words in the Receive FIFO. Rearm Threshold Interrupt – Write ‘1’ to rearm the threshold register. Writing ‘0’ has no effect. Data present –...

  • Page 47: Transaction Channel 0 (Send Channel

    REGISTER SET B.4.9 Transaction Channel 0 (Send Channel) Send Queue Address (QADDR0) – Offset 0x20 Field Description Access Reset Value 3 to 0 Reserved – Write as ‘0’ None 31 to 4 Bits 31 through 4 of PCI address for the transaction queue.
  • Page 48 REGISTER SET Send Transaction CSR (TNS_CSR0) – Offset 0x30 Field Description Access Reset Value Interrupt Enable – Set to ‘1’ to enable an interrupt on this transaction. Set to ‘0’ for normal operation. Skip entry – skips to the next entry when this bit is set. Set to ‘1’...
  • Page 49 REGISTER SET Send Chain Length/Flags (CLENFLGS0) – Offset 0x48 Field Description Access Reset Value 23 to 0 Length of buffer in 32-bit words. End Chain – Write ‘1’ to say this is the last chain entry. Write ‘0’ if it is not. Reserved.

  • Page 50: Transaction Channel 1 (Receive Channel

    REGISTER SET B.4.10 Transaction Channel 1 (Receive Channel) Receive Queue Address (QADDR0) – Offset 0x50 Field Description Access Reset Value 3 to 0 Reserved – Write as ‘0’ None 31 to 4 Bits 31 through 4 of PMC address for the transaction queue.
  • Page 51 REGISTER SET Receive Transaction CSR (TNS_CSR0) – Offset 0x60 Field Description Access Reset Value Interrupt Enable – Set to ‘1’ to enable an interrupt on this transaction. Set to ‘0’ for normal operation. Skip entry – Skips to the next entry when this bit is set. Set to ‘1’...
  • Page 52 REGISTER SET Receive Chain Length/Flags (CLENFLGS0) – Offset 0x78 Field Description Access Reset Value 23 to 0 Length of buffer in 32-bit words. End Chain – Write ‘1’ to say this is the last chain entry. Write ‘0’ if it is not. Reserved.
  • Page 53 C. C – SL240/SL240 PROTOCOL APPENDIX C SL240 PROTOCOL TABLE OF CONTENTS C.1 Overview ..............................C-1 C.2 Ordered Sets Used ...........................C-1 C.3 Frames ..............................C-3 C.3.1 Link Bandwidth ........................C-4 C.3.2 FPDP Signal Sample Rate ....................C-4 C.4 Data Transmission and Flow Control ......................C-5 FIGURES Figure C-1 VITA 17.1 Framing Protocol.......................C-3 TABLES...

  • Page 55: Overview

    SL240 PROTOCOL C.1 Overview NOTE: The FibreXtreme SL240 PCI, PMC, and CPCI Cards will be referred to throughout this appendix as PMC. Anything that is exclusive to the PCI, PMC, or CPCI Cards will be described as such. The SL240 Serial FPDP protocol (also known as VITA 17.1) is designed to provide near optimal throughput while maintaining low overhead.
  • Page 56 SL240 PROTOCOL Table C-1 Ordered Set Mapping Fibre Channel VITA 17.1 Description Ordered Set Ordered Set Start of Frame: SOFc1 PIO1 = 0, PIO2 = 0, DIR = 0 Start of Frame: SOFi1 PIO1 = 0, PIO2 = 0, DIR = 1 Start of Frame: SOFn1 PIO1 = 0, PIO2 = 1, DIR = 0...

  • Page 57: Frames

    SL240 PROTOCOL C.3 Frames There are four basic frame types defined in VITA 17.1 – an IDLE frame, data frame, a SYNC without data frame, and a SYNC with data frame. The data is divided into frames so the FPDP signals are sampled at some minimum interval, and so the receiver is guaranteed to see IDLEs to maintain synchronization.

  • Page 58: Link Bandwidth

    SL240 PROTOCOL C.3.1 Link Bandwidth With CRC disabled and the Copy Mode Master bit clear (‘0’), there is a five-word overhead for every frame transmitted. Since frames can contain up to 512 words of data, this results in an efficiency of 99.03%. With CRC enabled and the Copy Master bit clear, there is a six-word overhead for every frame transmitted.

  • Page 59: Data Transmission And Flow Control

    GO—if it is STOP, then the data waits in the Transmit FIFO until the signal changes. Curtiss-Wright Controls’ SL240 boards use the same protocol when transmitting from either end to allow the link to operate bi-directionally. Since these data streams are independent, the maximum throughput on the link would be 494 MB/s for SL240.
  • Page 60 SL240 PROTOCOL This page intentionally left blank. Copyright 2006 FibreXtreme Hardware Reference Manual...
  • Page 61 D. D - ORDERING INFORMATION APPENDIX D ORDERING INFORMATION TABLE OF CONTENTS D.1 Overview D.2 Ordering Information ........................D-1 D.2.1 Short Wavelength: Multimode Fiber-Optic Cables ..............D-1 TABLES Table D-1 LC to LC ..........................D-1 Table D-2 LC to ST ..........................D-1 Table D-3 SC to LC ..........................
  • Page 63 ORDERING INFORMATION D.1 Overview This appendix contains the order number for all Curtiss-Wright Controls, Inc. products mentioned in this manual. For an up to date list, or for inquiries about these products, contact Curtiss-Wright Controls, Inc. Embedded Computing Data Communications Center Sales.
  • Page 64 ORDERING INFORMATION This page intentionally left blank Copyright 2006 FibreXtreme Hardware Reference Manual...
  • Page 65 1. GLOSSARY GLOSSARY...
  • Page 67 10 kilometers. Supported topologies include point-to-point, arbitrated- loop, and fabric switches. FibreXpress -----------------------A Curtiss-Wright Controls, Inc. trademark name for a family of networking products that maximize the superior communication and interconnect capabilities of ANSI standard Fibre Channel. The FX200 series of 64-bit adapters support up to 200 MB per second (400 MB per second duplex) throughput.
  • Page 68 GLOSSARY FPDP -------------------------------Front Panel Data Port. frame -------------------------------A linear set of transmitted bits that define a basic transport element. A frame is the smallest indivisible packet of data that is sent on the FC. Gbps --------------------------------Gigabits per second. KB ----------------------------------KiloBytes. latency------------------------------The delay between the initiation of data transmission and the receipt of data at its destination.
  • Page 69 GLOSSARY PCI -----------------------------------Peripheral Component Interface. Physical Layer Switch ----------Multipurpose, non-blocking 32-port cross-point switch for digital speeds up to 2.5 Gbps. PIO-----------------------------------Programmed Input/Output. PMC ---------------------------------PCI Mezzanine Card. Everything that is true for PCI cards is true for PMC except there is a footprint or card format change. point-to-point ---------------------Bi-directional links that interconnect the N_ports of a pair of nodes.
  • Page 70 GLOSSARY This page intentionally left blank Copyright 2006 GLOSSARY-4 FibreXtreme Hardware Reference Manual...
  • Page 71 1. INDEX INDEX...

  • Page 73: Index

    INDEX connectors fiber-optic ...........3-2 1.0625 Gbps ...........C-1 control registers ..........4-5 copy master............C-4 8B/10B copy master mode ........B-6, C-4 encoding.............C-1 copy mode master .......... C-4 8B/10B decoding ........... 4-3 CRC ........4-3, 4-5, B-5, C-4 8B/10B encoding ........... 2-2 8B10B decoding errors...........B-8 data...
  • Page 74 INDEX multimode ......... A-2, D-2 fiber-optic cable ..........3-2 laser FIFO..........B-5, B-10, C-2 manual shutdown ........B-10 overflow .............B-9 short wavelength......2-2, 3-2, D-2 receive .. 2-2, 2-9, 4-2, 4-3, 4-5, B-1, B-2, B-5, latency B-6, B-7, B-8, B-10 reduce............4-2 release ............B-7 retransmit ..........
  • Page 75 INDEX multi-drop FPDP bus ........2-9 JTAG............B-4 multimode fiber-optic cables ......D-2 RS-232 ............2-4 multiple signal processors......2-9 portability............4-1 ports non-blocking..........2-4 network............2-9 power users ............1-1 dissipation..........A-1 node..........3-2, 4-3, 4-4 transmit ............A-2 master ............2-10 power usage ...........A-1 receiving ............. 4-3 programming ........
  • Page 76 INDEX /SYNC without DVALID ......B-12 enhanced .............2-2 DIR......4-3, B-6, B-9, C-1, C-2, C-4 high .............2-5 FEOF............C-1 maximum ........... C-5 FPDP ............4-2 maximum sustained ........C-4 IDLE ..........C-1, C-2 optimal ............C-1 MEOF ............C-1 usable ............C-1 NRDY ....4-3, B-6, B-9, C-1, C-2, C-4 topology ...........2-7, 3-2, B-6 PIO1 ......

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