3.4.7.6
3.4.8
3.4.9
3.4.10
3.5
Setup Submenu: Chipset .................................................................................... 73
3.5.1
3.5.2
3.6
3.6.1
3.6.1.1
3.7
Setup Submenu: Boot ......................................................................................... 85
3.8
4.1
A.1
B.1
I/O Address Map .................................................................................................. 97
B.2
IRQ Mapping Chart ............................................................................................. 99
B.3
Memory Address Map ........................................................................................ 111
C.1
C.2
DIO Programming .............................................................................................. 114
C.3
Digital I/O Register.............................................................................................. 115
C.4
D.1
Preface
Key Management ..................................................................... 81
XIII