Table of Contents
Advertisement
3.9 Ethernet
The MV64560 provides two Ethernet MACs that are capable of 10/100/1000BaseT
Ethernet. These are connected to the physical interface by two Marvell 88E1111
PHYs. The network (MAC) addresses are factory configured and cannot be altered in
the field.
Both channels are available through the
or one 10/100/1000BaseT port, software selectable.
Twelve associated status
functions of these LEDs are Tx activity, Rx activity, Duplex, Link 10, Link 100 and
Link 1000, but these functions may be overridden by software.
3.10 USB 2.0
The MV64560 provides two USB 2.0 OCHI/EHCI-compliant Host Ports, which are
routed to the
capable of providing up to 0.5 Amps of power at +5.0 V. For more details, see the
EPLD
3.11 Timers
The MV64560 provides four 32-bit timer/counters that operate at a frequency of
133 MHz and have a resolution of 7.5 ns.
There is an option for software to cascade two timers to form a 64-bit timer/counter.
This is done by connecting the terminal count signal of Timer 2 (TC_NTn[2]) to the
count enable input of Timer 3 (TC_ENn[3]) using the Multi-Purpose Pins and the
EPLD
3.12 Watchdog Timer
The MV64560 provides a 32-bit watchdog timer. The count-down timer is loaded
with a preset value and must be serviced periodically to prevent it expiring. The
watchdog timer operates at a frequency of 133 MHz and has a resolution of 7.5 ns. It
is disabled by default following reset.
Two thresholds may be set. The first generates an interrupt to the processor and the
second causes a hard reset to the local processor.
Publication No. IMP2B-0HH/5
LEDs
J2
connector. Each port has a software-enabled power controller
Control Register
1.
Control Register
1.
J2
connector, either as two 10/100BaseT ports
are mounted on the rear of the board. The default
Functional Description 25
Advertisement
Table of Contents
