Acer Aspire 4743Z Service Manual page 201

Table 4-4. POST Codes
POST Code
0x1A Initialize DMA command register with these settings:
1. Memory to memory disabled
2. Channel 0 hold address disabled
3. Controller enabled
4. Normal timing
5. Fixed priority
6. Late write selection
7. DREQ sense active
8. DACK sense active low. Initialize
0x22 Reset the keyboard.
0x40 Test A20 line
0x67 Quick initialization of all Application Processors in a
multiprocessor system
0x32 Compute CPU speed.
0x69 Initialize the handler for SMM.
0x6B If CMOS is bad, load Custom Defaults from flash into
CMOS. If successful, reboot.
0x3C If CMOS is valid, load chipset registers with values from
CMOS, otherwise load defaults and display Setup prompt.
If Auto Configuration is enabled, always load the chipset
registers with the Setup defaults (Rel 6.0).
0x3D Load alternate registers with CMOS values.
0x42 Initialize interrupt vectors 0 thru 77h
0x46 Verify the ROM copyright notice.
0x45 Initialize all motherboard devices.
0x49 1. Size the PCI bus topology and set bridge bus numbers.
2. Set the system max bus number.
3. Write a 0 to the command register of every PCI device.
4. Write a 0 to all 6 base registers in every PCI device.
5. Write a -1 to the status register of every PC
0xC6 Initialize note dock
0xC5 PnPnd dual CMOS (optional)
0x48 Verify that the equipment specified in the CMOS matches
the hardware currently installed. If the monitor type is set
to 00 then a video ROM must exist. If the monitor type is 1
or 2 set the video switch to CGA. If monitor type 3, set the
video switch to m
0xD1 Initialize BIOS stack
0xD3 Setup E820h and WAD memory map
Troubleshooting
Function Phase Component
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
LBT Core
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