Uart Interfaces - Quectel LPWA Series Manual

attention to the selection of the device. Typically, the stray capacitance should be less than 2 pF.

Keep the ESD protection devices as close to the USB connector as possible.
NOTES
1. The USB interface is under development, it is not recommended to use at present.
2. The input voltage range of USB_VBUS is 1.19–2.0 V.

3.11. UART Interfaces

The module provides three UART interfaces: the main UART interface, the debug UART interface and the
auxiliary UART interface. Features of them are illustrated below:

The main UART interface supports 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200 bps,
230400 bps, 460800 bps, 921600 bps and 3000000 bps baud rates, and the default is 115200 bps. It
is used for data transmission and AT command communication, and supports RTS and CTS
hardware flow control. The default frame format is 8N1 (8 data bits, no parity, 1 stop bit).

The debug UART interface supports 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200 bps,
230400 bps, 460800 bps, 921600 bps and 3000000 bps baud rates, and the default is 115200 bps. It
is used for firmware upgrade, software debugging and log output, and supports RTS and CTS
hardware flow control. The default frame format is 8N1 (8 data bits, no parity, 1 stop bit).

The auxiliary UART interface supports 921600 bps baud rate by default, and is used for RF
calibration and log output, and supports RTS and CTS hardware flow control. The default frame
format is 8N1 (8 data bits, no parity, 1 stop bit).
The following tables show the pin definition of three UART interfaces.
Table 13: Pin Definition of Main UART Interface
Pin Name Pin No.
MAIN_DTR 62
MAIN_RXD 6
MAIN_TXD 7
MAIN_CTS 39
MAIN_RTS 38
MAIN_DCD 90
BG770A-GL_Hardware_Design
I/O Description
DI/PU Main UART data terminal ready
DI/PU Main UART receive
DO/PU Main UART transmit
DO/PU Main UART clear to send
DI/PU Main UART request to send
DO/PU Main UART data carrier detect
LPWA Module Series
BG770A-GL Hardware Design
Comment
1.8 V power domain
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