Atmel 10-Way Jtag Header (Jtag Interface) - Equinox Systems PPM3 Reference Manual

I/o connector modules
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Datasheet of EQ-IOCON-3 - MOD PPM3 CONN-3 I/O ATMEGA JTAG
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3.9 Atmel 10-way JTAG Header (JTAG Interface)

This connection method is suitable for interfacing the programmer to a Target System which features
the following:
An Atmel device which features a JTAG ISP port e.g. ATmega16 / 32 / 64 /128 / 169 / 323.
Atmel 10-way IDC JTAG Header
This is the same header as used on the Atmel JTAG-ICE emulator.
To implement this connection, simply plug the 10-way ISP cable into the 10-way ISP Header marked
'JTAG' and plug the other end of the cable into the matching header on the Target System.
Pin
Programmer
No
Pin name
1
PROG_TCK
2
PROG_GND
3
PROG_TDO
4
PROG_VCC
5
PROG_TMS
6
PROG_RESET
Figure 4.9.1 - Atmel 10-way IDC Header (J8) viewed from
above
Warning!
Connecting to the wrong ISP Header may cause
catastrophic damage to the Programmer & Target
System
Programmer
Connect to
Input /
pin on
Output
Target Device
O
TCK
P
GROUND
I
TDO
P
TARGET_VCC Target Vcc Connection
O
TMS
O
RESET
Description
JTAG TCK – Test Clock Signal pin
Clock signal from programmer to Target
Device JTAG port.
Ground Connection
Common ground connection between
Programmer and Target System.
JTAG TDO – Test Data Output pin
Data signal from Target device JTAG port
to programmer.
- Pins 4 + 7 are physically connected
inside the programmer.
- Connects to Vcc rail of Target System.
- Pin referred to as VTref on Atmel JTAG-
ICE.
JTAG TMS – Test Mode Select pin
Mode Select Signal from programmer to
Target Device JTAG port.
Microcontroller RESET control signal
This pin connects to the main RESET pin
of the Target Microcontroller. This pin is
not strictly needed for JTAG programming,
but it can be used to RESET the Target
Device before and after programming.

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