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14
The LEAD 7 signal at pin 5 of flip . flop El is high if
horse #7, the pace horse, is in the lead. However, the LEAD
7 signal does not affect the lead information just described,
and does not cause the racetrack to speed up.
Flip-flop 87 and type-9316 counter H3 form the frame
counter. The VF1 signal, which goes high only once per
frame on the TV screen, provides the clocking at H3 pin 2.
The frame counter's output signals, 4F, 2F and 1 F, are
applied to a 4-to-10 demultiplexer device in location ]3.
The outputs from J 3 are gated to produce the FWD1 through
FWD6 and the FWD7 signals for the horizontal motion
counters just described. The time relationships between the
frame counter's outputs and the FWDl through FWD7
signals are shown in Figure 3-4.
On the schematic note the jumpering point drawn
between ground and the junction of resistor R9 and H3
pin 5. With the jumpering point connected, the frame
counter has a maximum count of 32 (two-minute game).
With the jumpering point not connected, the maximum
count is 24 (90-second game). This feature comprises the
2-minute/90-second owner/operator game time option.
Figure 3-4 shows that each horse is allowed to move
forward on a different frame on the TV screen. When
structuring is for a 90-second game, each player horse can
move forward once every 12 frames, and when structuring
is for a 2-minute game, once every 16 frames. But player
horses can drop back on any frame.
Figure 3-4 also shows that the FWDl through FWD6
signals are generated twice as often as the FWD7 signal.
This means that the #7 pace horse can advance toward the
finish line only half as often as player horses can. However,
the pace horse never drops back, that is, never strikes a
picket. This is why a REV7 signal is not necessary.
The terminal count signals TCl through TC7 from the
motion counters go to the horse video circuitry (para. 3.4.10)
and indicate when to start showing horse video.
3.4.8 LEADER DETECTION CIRCUIT (SHEET 2
ZONES C 2, 3 AND D 2, 3): The TCl through TC6 signals,
ORed together in gate P6, and the VRESET signal, which
occurs on the last horizontal scan line of each frame on the
TV screen, are gated at H4 pin 3 to produce a clocking
signal. This signal causes certain information to be gated
into latches N7, N6 and A4. The very last TC pulse on this
last scan line leaves the following information in these
latches for the next entire frame: which horse is in the lead
(the LEAD 1 through LEAD 6 signals). and where the lead
horse is located (A, A , B and C signals). If horses are tied,
both LEAD signals will be high. The lead information is
used to make the lead player horse's jump shorter than the
jump of the other horses, and to blink the winner at the
end of the race. The location information is used to speed
up the race track and the gallop rate as the leader progresses.
3.4.9 JUMP AND FALL CIRCUITRY (SHEET 1 ZONES
THROUGH 8 and B 7,8; SHEET 2 ZONE D 1): To
C,D, 5
cause a horse to jump, the player has to depress the corres
ponding front panel push button. Doing this produces a sig
nal whose edge sets a flip-flop: for horse #1 this occurs at L8
pin 3. The flip-flop's output at L8 pin 6 then causes a type-
9316 counter, which is configured as a programmable one
shot, to start timing on the next cycle of the 1 /2
CLOCK signal. The length of its timing is determined by
whether that horse ( #1) or the pace horse ( #7) is in the lead.
Since the 1/2 TRACK CLOCK signal is proportional to the
speed of the track, this one-shot controls the distance of the
jump with respect to the track, regardless of the track speed.
When the type-9316 counter reaches terminal count, the
TC signal at L6 pin 15 is used to disable further counting
until a load or a master reset command occurs. Note that
with this configuration a jump cannot be initiated if the
game is in the attract mode, or if the horse is already jump
ing or falling.
The hit detection circuitry (on sheet 2 zone D 1)
initiates the fall sequence. The coincidence of horses and
pickets is detected at gate F2 pin 12, and a signal is pro
duced whenever a horse strikes a picket. Gating at F2 pin 8
disables any hits during the first one-eighth part of the race
track. The 1-frrTR- I GGER generated at A4 pin 5 is decoded
into six separate signals HITl through Hti6 by the demulti
plexer device in location NS. This decoding is possible
because the vertical sync information contained in the 32V,
64V and 128V signals determines which horse hit a picket
when the HIT TRfGGE R signal is present.
The signals H1fl through HITo go to the master reset
inputs at the jump/fall one-shots and to the fall flags (on
sheet 1). For example, the FflT1 signal goes to its one-shot
at L6 pin 1, and to the fall flag LS at pin 4, which has the
signal FALL 1 at LS pin 5. The one-shot L6 then counts for
15 cycles of the½ TRACK CLOCK signal, until the terminal
count signal at L6 pin 15 resets the fall flag at LS pin 13
and completes the timing cycle. To move the horse back
wards, the REV1 signal is generated on every other cycle of
the½ TRACK CLOCK signal.
In a separate pace horse jump circuit (sheet 2 zone A
4,5), gate K4 senses when a picket is within a one-half horse
length in front of the pace horse and produces a signal at
K4 pin 13. This signal forces flip-flop ]4 into a jump condi
tion and the signal JUMP 7 is produced until the picket is
behind the pace horse. No fall circuitry is required for the
p,1ce horse because the pace horse cannot hit a picket.
TRACK
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