National Instruments PXI-7831R Where To Start page 9

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5. Navigate to
LabVIEW 7.0\examples\FPGA\Applets
\Default 7831\
example appears in the Example description field of the Example
Finder dialog box.
6. Double-click
1 RIO Board (Host).vi
1 RIO Board (Host) VI example.
7. Click the Run button.
8. If you are running a Real-Time system, a Downloading dialog box
appears to display the progress of the example VI as it downloads to
the Real-Time controller.
Some users might see a Downloading dialog box briefly appear to
display the progress of the FPGA VI as it downloads to the FPGA on
the NI PXI-7831R. This dialog box only appears if the FPGA VI is not
already downloaded to the FPGA.
9. The example should now be running and returning data from the
PXI-7831R. The example is acquiring data from AI channel 1 and
displaying that data on the indicator labeled AI 1. The data is displayed
as a signed 16-bit number that varies from –32768 to 32767 as the
voltage on AI channel 1 varies from –10.0 V to +10.0 V. If you have a
signal source available, connect it to AI channel 1 (connect AI1+ to the
signal, and AI1– to ground) and confirm that the data returned
corresponds to the voltage input. If you do not have a signal source
available, connect AI1+ and AI1– both to ground and confirm that the
number returned by the AI 1 indicator is close to 0.
10. The Loop Period control determines the analog input sampling rate.
This period is specified in cycles of the PXI-7831R onboard 40 MHz
oscillator. So, specifying a Loop Period of 40,000,000 results in the
analog input being sampled once every second. Vary the Loop Period
and watch how it affects the update rate of the AI 1 indicator. If you set
the Loop Period too low, the computer cannot read data from the AI
channel as fast as it is sampled. In this case, the Overrun indicator
lights up indicating that you are trying to run the example too fast.
11. Click the STOP button to stop the VI. If you encountered any
problems running the VI, refer back to the software and hardware
installation instructions in this document and verify that everything is
installed correctly.
12. Select Window»Show Block Diagram from the 1 RIO Board (Host)
VI toolbar to view the block diagram. This example actually consists
of two separate VIs—the 1 RIO Board (Host) VI, which runs on the
Windows or LabVIEW Real-Time machine, and a second VI, Default
7831R (FPGA) VI, which runs on the PXI-7831R FPGA. As you look
at the 1 RIO Board (Host) VI block diagram, the left-most terminal on
the block diagram is an Open FPGA VI Reference function that
downloads the Default 7831R (FPGA) VI to the FPGA on the
in the listbox. Notice that a brief description of the
9
in the listbox to launch the
Where to Start with the NI PXI-7831R