Table of Contents
Advertisement
DRAM Timing
This item determines DRAM clock/ timing follow SPD or not.
The Choices: By SPD(default), Manual.
SDRAM CAS Latency
When DRAM is installed, the number of clock cycles of CAS latency
depends on the DRAM timing.
The Choices: 2.5, 2 (default).
Bank Interleave
This item allows you to enable or disable the bank interleave feature.
The Choices: Disabled (default).
Precharge to Active (Trp)
This items allows you to specify the delay from precharge command to
activate command.
The Choices: 2T, 3T (default).
Active to Precharge (Tras)
This items allows you to specify the minimum bank active time.
The Choices: 7T (default), 6T.
Active to CMD (Trcd)
Use this item to specify the delay from the activation of a bank to the
time that a read or write command is accepted.
The Choices: 2T, 3T (default).
DRAM Command Rate
This item controls clock cycle that must occur between the last valid
write operation and the next command.
The Choices: 1T Command, 2T Command (default).
DRAM Burst Len
The Choices: 4 (default), 8.
Write Recovery Time
The Choices: 3T (default), 2T.
AGP & P2P Bridge Control
If you highlight the literal "Press Enter" next to the "AGP & P2P Bridge Control"
label and then press the enter key, it will take you a submenu with the following
options:
AGP Aperture Size
Select the size of the Accelerated Graphics Port (AGP) aperture. The
aperture is a portion of the PCI memory address range dedicated for
BIOS Setup
- 12 -
Advertisement
Table of Contents
