Seagate Exos AP 4U100 Installation And Maintenance Manual page 130

POST Code
B7
BE
B7
B8
B9
BA
B9
BB
B7
BC
BF
E6
E7
E8
E9
EB
EC
ED
EE
83
41
4B
52
4D
41
59
41
A2
41
5A
10
41
11
12
13
15
1A
1B
16
20
130 BIOS POST Codes
Definition
Channel Training
SSA API INIT
Channel Training
Initialize Throttling
MEM BIST
MEM Initial
MEM BIST
DDR Memory Map
Channel Training
RAS Config
MRC Done
IIO late init entry
PCIE port init
IOAPIC init
VTD init
IIO DFX init
NTB init
Security init
IIO late init exit
Set cache for physical memory
South bridge SPI initial
Variable Service Initial
RTC Initial
MTC Initial
South bridge SPI initial
Legacy BIOS initial
South bridge SPI initial
SMM service initial
South bridge SPI initial
Legacy interrupt function initial
Enter BDS entry
South bridge SPI initial
Install Hotkey service
ASF Initial
PCI enumeration
PCI enumeration complete
USB BUS driver initial
USB device driver initial
Keyboard Controller, Keyboard and Mouse initial
SIO controller initial