Table of Contents
Advertisement
3.2. Pin Assignment
VCC_BT*
GND
SWDIO_BT*
SWDCLK_BT*
TXD_BT*
RXD_BT*
GND
BT_ANT*
GND
RESERVED
RESERVED
RESERVED
RESERVED
PWRKEY
RESET
RESERVED
NOTES
1.
Keep all reserved pins unconnected.
2.
"*" means under development.
BC950N-N1_Hardware_Design
1
2
74
GND
3
94
4
GND
5
55
75
RXD _A UX
GP IO1_B T*
6
56
76
7
TX D_A UX
GP IO2_B T*
BC950N-N1
57
77
8
CTS_A UX
RES E T_B T*
9
Top View
58
78
RTS_A UX
GP IO3_B T*
10
59
79
GND
11
GP IO4_B T*
60
80
12
GND
RES E RV ED
13
81
14
GND
61
15
GND
16
Power
GND
Other
ADC*
RESERVED
Figure 2: Pin Assignment
73
72
71
GND
GND
GND
93
92
91
GND
GND
RES E RV ED
90
70
RES E RV ED
RES E RV ED
89
69
RES E RV ED
RES E RV ED
88
68
USB _MO DE
RES E RV ED
87
67
USB _DP
RES E RV ED
86
66
USB _DM
GND
85
65
USB _3V3
GND
82
83
84
GND
GND
RES E RV ED
62
63
64
GND
GND
GND
ANT
USIM
UART
USB
LPWA Module Series
BC950N-N1 Hardware Design
43
GND
42
SIM_GND
41
SIM_CLK
40
SIM_DATA
39
SIM_RST
38
SIM_VDD
37
RESERVED
36
RESERVED
35
RESERVED
34
RI
33
RESERVED
32
RESERVED
RESERVED
31
30
TXD
29
RXD
28
RESERVED
14 / 59
Advertisement
Table of Contents
