Quectel BC950N-N1 Hardware Design

Quectel BC950N-N1 Hardware Design

Lpwa modules

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BC950N-N1
Hardware Design
LPWA Module Series
Rev. BC950N-N1_Hardware_Design_V1.0
Date: 2019-06-14
Status: Preliminary
www.quectel.com

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Summary of Contents for Quectel BC950N-N1

  • Page 1 BC950N-N1 Hardware Design LPWA Module Series Rev. BC950N-N1_Hardware_Design_V1.0 Date: 2019-06-14 Status: Preliminary www.quectel.com...
  • Page 2 QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS’ REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION.
  • Page 3: About The Document

    LPWA Module Series BC950N-N1 Hardware Design About the Document History Revision Date Author Description Ostrovsky WEI/ 2019-06-14 Newgate HUA/ Initial Scofield ZHANG BC950N-N1_Hardware_Design 2 / 59...
  • Page 4: Table Of Contents

    LPWA Module Series BC950N-N1 Hardware Design Contents About the Document ........................... 2 Contents ............................... 3 Table Index ..............................5 Figure Index ..............................6 Introduction ............................7 1.1. Safety Information ........................8 Product Concept ..........................9 2.1. General Description ........................9 2.2.
  • Page 5 LPWA Module Series BC950N-N1 Hardware Design 4.1. Pin Definition ..........................38 4.2. Operating Frequencies ......................38 4.3. RF Antenna Reference Design ....................39 4.4. Reference Design of RF Layout ....................40 4.5. Antenna Requirements ......................42 4.6. RF Output Power ........................43 4.7.
  • Page 6 LPWA Module Series BC950N-N1 Hardware Design Table Index TABLE 1: FREQUENCY BANDS OF BC950N-N1 MODULE ................9 TABLE 2: BC950N-N1 KEY FEATURES ...................... 10 TABLE 3: I/O PARAMETERS DEFINITION ....................15 TABLE 4: PIN DESCRIPTION ........................15 TABLE 5: OPERATING MODE OF AP ......................19 TABLE 6: OPERATING MODE OF MODEM ....................
  • Page 7 LPWA Module Series BC950N-N1 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ......................12 FIGURE 2: PIN ASSIGNMENT ........................14 FIGURE 3: MODULE POWER CONSUMPTION IN DIFFERENT MODES ........... 21 FIGURE 4: TIMING OF WAKING UP MODULE FROM PSM ................ 22 FIGURE 5: REFERENCE CIRCUIT FOR POWER SUPPLY .................
  • Page 8: Introduction

    This document can help customers quickly understand module interface specifications, electrical and mechanical details, as well as other related information of the module. Associated with application notes and user guides, customers can use BC950N-N1 to design and set up mobile applications easily. BC950N-N1_Hardware_Design...
  • Page 9: Safety Information

    BC950N-N1 module. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for customers’ failure to comply with these precautions.
  • Page 10: Product Concept

    Featuring compact form factor, ultra-low power consumption and extended temperature range, BC950N-N1 is a best choice for a wide range of IoT applications, such as smart metering, bike sharing, smart wearables, smart parking, smart city, home appliances, security and asset tracking, agricultural and environmental monitoring, etc.
  • Page 11: Key Features

    LPWA Module Series BC950N-N1 Hardware Design 2.2. Key Features The following table describes the detailed features of BC950N-N1 module. Table 2: BC950N-N1 Key Features Feature Details  Supply voltage: 3.4V~4.6V Power Supply  Typical supply voltage: 3.8V  Power Saving Typical power consumption: 4.2μA...
  • Page 12: Functional Diagram

    When the temperature returns to normal operation temperature levels, the module will meet 3GPP specifications again. "*" means under development. 2.3. Functional Diagram The following figure shows a block diagram of BC950N-N1 and illustrates the major functional parts.  Radio frequency ...
  • Page 13: Development Board

    “*” means under development. 2.4. Development Board Quectel provides a complete set of development tools to facilitate the use and testing of BC950N-N1 module. The development tool kit includes TE-B board, USB cable, antenna and other peripherals. For more details, please refer to document [1].
  • Page 14: Application Interfaces

    LPWA Module Series BC950N-N1 Hardware Design Application Interfaces 3.1. General Description BC950N-N1 is equipped with a total of 94 pins, including 54 LCC pins and 40 LGA pins. The subsequent chapters will provide detailed descriptions of the following functions/pins/interfaces:  ...
  • Page 15: Pin Assignment

    LPWA Module Series BC950N-N1 Hardware Design 3.2. Pin Assignment VCC_BT* SIM_GND SIM_CLK SWDIO_BT* SIM_DATA SWDCLK_BT* RES E RV ED SIM_RST TXD_BT* RES E RV ED RES E RV ED RXD _A UX GP IO1_B T* SIM_VDD RXD_BT* RESERVED TX D_A UX...
  • Page 16: Pin Description

    LPWA Module Series BC950N-N1 Hardware Design 3.3. Pin Description Table 3: I/O Parameters Definition Type Description Analog input Analog output Digital input Digital output Bidirectional Power input Power output Table 4: Pin Description Power Supply Pin Name Pin No. Description...
  • Page 17 LPWA Module Series BC950N-N1 Hardware Design 48, 51, 52, 54, 59~66, 71~74, 81~83, 92~94 Power Key Interface Pin Name Pin No. Description DC Characteristics Comment Pull down max=0.99V PWRKEY PWRKEY to turn min=2.3V on the module Reset Interface Pin Name Pin No.
  • Page 18 LPWA Module Series BC950N-N1 Hardware Design Pin Name Pin No. Description DC Characteristics Comment Receive data 3.0V power domain. Transmit data Auxiliary UART Port Pin Name Pin No. Description DC Characteristics Comment RXD_AUX Receive data TXD_AUX Transmit data 3.0V power domain.
  • Page 19 LPWA Module Series BC950N-N1 Hardware Design USIM card Antenna Interface Pin Name Pin No. Description DC Characteristics Comment RF antenna RF_ANT interface 50Ω impedance. BT antenna BT_ANT* interface USB Interface Pin Name Pin No. Description DC Characteristics Comment Pull this pin low to implement USB download function.
  • Page 20: Operating Modes

    LPWA Module Series BC950N-N1 Hardware Design GPIO1_BT*, GPIO2_BT*, 75, 76, GPIO3_BT*, 78, 79 GPIO4_BT* Reserved Pins Pin Name Pin No. Description DC Characteristics Comment 10~13, 16, 17, 22~25, 31~33, Keep these pins 35~37, Reserved RESERVED unconnected. 44, 49, 67~70, 80, 84,...
  • Page 21: Deep Sleep Mode

    LPWA Module Series BC950N-N1 Hardware Design Table 6: Operating Mode of Modem Mode Features Connected state: in Connected mode, module can send and receive data, Connected and modem can be switched to DRX/eDRX mode or PSM mode. Idle state: in DRX/eDRX mode, modem is in idle state and downlink data...
  • Page 22 LPWA Module Series BC950N-N1 Hardware Design Idle Idle Deep sleep T3324 T3412 UE inactive time Figure 3: Module Power Consumption in Different Modes The procedure for entering into Deep Sleep mode is as follows: the modem requests to enter into PSM (Power Saving Mode) in “ATTACH REQUEST”...
  • Page 23: Operating Modes Of Bluetooth

    3.4.3. Operating Modes of Bluetooth* TBD. 3.5. Power Supply 3.5.1. Power Supply Pins BC950N-N1 provides two VBAT pins for connection with an external power supply. The table below describes the module's VBAT and ground pins. Table 8: Power Supply Pins Pin Name Pin No.
  • Page 24: Reference Design For Power Supply

    Power design for a module is critical to its performance. It is recommended to use a low quiescent current LDO with output current capacity of 0.5A as the power supply for BC950N-N1. A Li-MnO2/2S alkaline battery can also be used as the power supply. The supply voltage of the module ranges from 3.4V to 4.6V.
  • Page 25: Power Up/Power Down Scenarios

    LPWA Module Series BC950N-N1 Hardware Design 3.6. Power up/Power Down Scenarios 3.6.1. Power up BC950N-N1 will be powered up after driving the PWRKEY pin to a low level voltage for at least 500ms. Table 9: PWRKEY Pin Pin Name Pin No.
  • Page 26: Power Down

    PWRKEY cannot be pulled down all the time, otherwise the module will not be able to enter into Deep Sleep. 3.6.2. Power Down BC950N-N1 can be powered off though any of the following methods:  Power off by AT+QPOWD=0. ...
  • Page 27: Reset The Module

    LPWA Module Series BC950N-N1 Hardware Design ≥5ms VBAT VDD_EXT Module RUNNING Status Figure 10: Power Down Timing (Power Down by Disconnecting VBAT) 3.6.3. Reset the Module Driving the RESET pin to a low level voltage for at least 50ms will reset the module.
  • Page 28: Usb Interface

    Figure 13: Reset Timing 3.7. USB Interface The USB interface of BC950N-N1 module conforms to USB 1.1 specifications and supports full speed (12Mbps) mode. The interface can be used for software debugging and software upgrading, and supports USB serial driver under Windows/Linux operating systems.
  • Page 29 LPWA Module Series BC950N-N1 Hardware Design Table 11: Pin Definition of USB Interface Pin Name Pin No. Description Note Pull this pin low to implement USB download function. USB_MODE Boot mode selection Suspended or pulled up 10KΩ resistor to 3.3V for normal boot mode.
  • Page 30: Uart Interfaces

    LPWA Module Series BC950N-N1 Hardware Design  NOTES USB_MODE must be pulled down so as to realize USB download function. When the USB interface is used for log capturing, the module will not be able to enter into Deep Sleep mode.
  • Page 31: Main Uart Port

    LPWA Module Series BC950N-N1 Hardware Design NOTE When the module enters into idle mode with a fixed baud rate, please send AT via UART to wake up the module first before sending other AT commands. 3.8.1. Main UART Port The main UART port supports AT command communication, data transmission and firmware upgrade.
  • Page 32: Auxiliary Uart Port

    LPWA Module Series BC950N-N1 Hardware Design Module TXD_DBG RXD_DBG Figure 16: Reference Design of Debug UART Port 3.8.3. Auxiliary UART Port The auxiliary UART port is designed as a general purpose UART for communication with DTE. It also supports log output for firmware debugging, and hardware flow control*. Its baud rate is 115200bps by default.
  • Page 33: Uart Application

    LPWA Module Series BC950N-N1 Hardware Design 3.8.5. UART Application The module provides 3.0V UART interfaces. A level translator should be used if the application is equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments (please visit http://www.ti.com for more information) is recommended. The following figure shows a reference design.
  • Page 34: Usim Interface

    LPWA Module Series BC950N-N1 Hardware Design The following circuit shows a reference design for the communication between the module and a PC with standard RS-232 interface. Please make sure the I/O voltage of level shifter which connects to module is 3.0V.
  • Page 35 LPWA Module Series BC950N-N1 Hardware Design The external USIM card is powered by an internal regulator in the module and supports 1.8V/3.0V power supply. Table 13: Pin Definition of USIM Interface Pin Name Pin No. Description Comment Voltage accuracy: 1.8V/3.0V±5%.
  • Page 36: Adc Interface

    LPWA Module Series BC950N-N1 Hardware Design decouple capacitor between SIM_VDD and GND should be not more than 1μF and be placed close to the USIM card connector.  To avoid cross talk between SIM_DATA and SIM_CLK, keep them away from each other and shield them separately with surrounded ground.
  • Page 37: Ri Behaviors

    LPWA Module Series BC950N-N1 Hardware Design 3.11. RI Behaviors When there is a message received or URC output, the module will notify DTE through RI pin. Table 15: RI Signal Status Module Status RI Signal Level Idle RI keeps in high level When an SMS is received, RI outputs 120ms low pulse first and then changes to high level and starts data output.
  • Page 38: Network Status Indication

    LPWA Module Series BC950N-N1 Hardware Design 3.13. Network Status Indication The NETLIGHT signal can be used to indicate the network status of the module. The following table illustrates the module status indicated by NETLIGHT. Table 16: Module Status Indicated by NETLIGHT...
  • Page 39: Antenna Interface

    LPWA Module Series BC950N-N1 Hardware Design Antenna Interface The pin 53 is the RF antenna pad and pin 8 is bluetooth antenna pad. The antenna port has an impedance of 50Ω. 4.1. Pin Definition Table 17: Pin Definition of NB-IoT & BT Antenna Interface Pin Name Pin No.
  • Page 40: Rf Antenna Reference Design

    50Ω.  BC950N-N1 comes with ground pads which are next to the antenna pad in order to give a better grounding. In order to achieve better RF performance, it is recommended to reserve a π type matching circuit ...
  • Page 41: Reference Design Of Rf Layout

    LPWA Module Series BC950N-N1 Hardware Design R1 0R RF_ANT Module Figure 25: Reference Design of NB-IoT Antenna Interface 4.4. Reference Design of RF Layout For user’s PCB, the characteristic impedance of all RF traces should be controlled as 50Ω. The impedance of the RF traces is usually determined by the trace width (W), the materials’...
  • Page 42 LPWA Module Series BC950N-N1 Hardware Design Figure 28: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 29: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design: ...
  • Page 43: Antenna Requirements

    LPWA Module Series BC950N-N1 Hardware Design 4.5. Antenna Requirements To minimize the loss on RF trace and RF cable, please pay attention to the antenna design. The following tables show the requirements on NB-IoT antenna. Table 19: Antenna Cable Insertion Loss Requirements...
  • Page 44: Rf Output Power

    LPWA Module Series BC950N-N1 Hardware Design 4.6. RF Output Power Table 21: RF Conducted Output Power Frequency Band Max. Min. 23dBm±2dB <-39dBm 23dBm±2dB <-39dBm 23dBm±2dB <-39dBm 23dBm±2dB <-39dBm 23dBm±2dB <-39dBm 23dBm±2dB <-39dBm 23dBm±2dB <-39dBm 23dBm±2dB <-39dBm 23dBm±2dB <-39dBm 23dBm±2dB <-39dBm 23dBm±2dB...
  • Page 45: Rf Receiving Sensitivity

    LPWA Module Series BC950N-N1 Hardware Design 4.7. RF Receiving Sensitivity Table 22: Receiving Sensitivity (with RF Retransmissions) Frequency Band Receiving Sensitivity -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm -129dBm BC950N-N1_Hardware_Design 44 / 59...
  • Page 46: Recommended Rf Connector For Antenna Installation

    LPWA Module Series BC950N-N1 Hardware Design 4.8. Recommended RF Connector for Antenna Installation If RF connector is used for antenna connection, it is recommended to use the U.FL-R-SMT connector provided by Hirose. Figure 30: Dimensions of the U.FL-R-SMT Connector (Unit: mm) U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT.
  • Page 47 LPWA Module Series BC950N-N1 Hardware Design Figure 32: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com. BC950N-N1_Hardware_Design 46 / 59...
  • Page 48: Electrical And Reliability Characteristics

    LPWA Module Series BC950N-N1 Hardware Design Electrical and Reliability Characteristics 5.1. Operation and Storage Temperatures The following table lists the operation and storage temperatures of BC950N-N1. Table 23: Operation and Storage Temperatures Parameter Min. Typ. Max. Unit Operation Temperature Range ºC...
  • Page 49: Electrostatic Discharge

    LPWA Module Series BC950N-N1 Hardware Design 5.3. Electrostatic Discharge The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and packaging procedures must be applied throughout the processing, handling and operation of any application that incorporates the module.
  • Page 50: Mechanical Dimensions

    This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimetre (mm), and the tolerances for dimensions without tolerance values are ±0.05mm. 6.1. Mechanical Dimensions of the Module Pin 1 Figure 31: BC950N-N1 Top and Side Dimensions (Unit: mm) BC950N-N1_Hardware_Design 49 / 59...
  • Page 51 LPWA Module Series BC950N-N1 Hardware Design Pin 1 Figure 32: Module Bottom Dimension (Unit: mm) BC950N-N1_Hardware_Design 50 / 59...
  • Page 52: Recommended Footprint

    LPWA Module Series BC950N-N1 Hardware Design 6.2. Recommended Footprint Pin 1 Figure 33: Recommended Footprint (Unit: mm) NOTE The module should be kept about 3mm away from other components on the host PCB. BC950N-N1_Hardware_Design 51 / 59...
  • Page 53: Top And Bottom Views Of The Module

    6.3. Top and Bottom Views of the Module Figure 33: Top View of the Module Figure 34: Bottom View of the Module NOTE These are renderings of BC950N-N1 module. For authentic appearance, please refer to the module that you receive from Quectel. BC950N-N1_Hardware_Design 52 / 59...
  • Page 54: Storage, Manufacturing And Packaging

    Storage, Manufacturing and Packaging 7.1. Storage BC950N-N1 module is stored in a vacuum-sealed bag. It is rated at MSL 3, and storage restrictions are shown as below. 1. Shelf life in the vacuum-sealed bag: 12 months at <40ºC/90%RH. 2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other high temperature processes must be: Mounted within 168 hours at the factory environment of ≤30ºC/60%RH.
  • Page 55: Manufacturing And Soldering

    LPWA Module Series BC950N-N1 Hardware Design 7.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass.
  • Page 56: Packaging

    LPWA Module Series BC950N-N1 Hardware Design Reflow Zone Max slope 2 to 3°C/sec Reflow time (D: over 220°C) 40 to 60 sec Max temperature 238°C~245°C Cooling down slope 1 to 4°C/sec Reflow Cycle Max reflow cycle NOTES 1. During manufacturing and soldering, or any other processes that may contact the module directly, NEVER wipe the module’s shielding can with organic solvents, such as acetone, ethyl alcohol,...
  • Page 57 LPWA Module Series BC950N-N1 Hardware Design Figure 35: Tape Dimensions (Unit: mm) Figure 36: Reel Dimensions (Unit: mm) BC950N-N1_Hardware_Design 56 / 59...
  • Page 58: Appendix A References

    Table 26: Related Documents Document Name Remark Quectel_BC950N-N1-TE-B_User_Guide BC950N-N1-TE-B User Guide Quectel_RF_Layout_Application_Note RF Layout Application Note Quectel_BC950N-N1_AT_Commands_Manual BC950N-N1 AT Commands Manual Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide Table 27: Terms and Abbreviations Abbreviation Description Analog-to-Digital Converter CoAP Constrained Application Protocol...
  • Page 59 LPWA Module Series BC950N-N1 Hardware Design kbps Kilo Bits Per Second Light Emitting Diode Li-MnO2 Lithium-manganese Dioxide Li-2S Lithium Sulfur Long Term Evolution LwM2M Lightweight M2M MQTT Message Queuing Telemetry Transport NB-IoT arrow Band-Internet of Things Printed Circuit Board Protocol Data Unit...
  • Page 60 LPWA Module Series BC950N-N1 Hardware Design Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value...

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