Vecow SPC-7000 User Manual page 44

Intel core i7/i5/i3 (tiger lake) ultra-compact fanless embedded system 1 gige lan, 1 2.5g gige lan, 10g usb, 2 com, 9v to 55v
Table of Contents

Advertisement

2.4.21 JDIO1, JDIO2 : GPIO from Super I/O
1 3
4
1
2
19
There is a 16-bit GPIO connector in the Top side. Each GPIO channel can be
configuration GPI or GPO.
JSEL_DIO header is for SYNC/SOURCE mode selection on ISO_DIO board
(DMX-100-E)
JDIO1 and JDIO2 pins are defined in the following table :
1
10
2.4.22 SW2 : RESET Button
Pin assignment as the following table :
3
4
©Vecow SPC-7000/7100/7200 User Manual
1
2
143
144
145
146
1
260
1
19
1
20
2
20
2
Pin No.
1
2
3
4
5
6
7
8
9
10
LAN2
28
15
43
1
3
3
2
1
2
3
1
2
SW2
4
LED1
LED2
SW2
Pin No.
1
1
2
3
40
3
1
39
8
5
18
14
10
13
1
4
9
5
1
4
JDIO1 Definition
SIO_GPI80
SIO_GPI81
SIO_GPI82
SIO_GPI83
SIO_GPI84
SIO_GPI85
SIO_GPI86
A
SIO_GPI87
+VDIO
GND
BY
U29
32
1
33
64
97
65
3
2
1
2
1
M2B_LED1
M2E_LED1
Definition
FP_RST_BTN_N
FP_RST_BTN_N
GETTING TO KNOW YOUR SPC-7000
2
1
7
3
1
1
1
1
1
1
7
1
1
10
10
7
R2
G
L3
G
L3
L1
L1
O
O
L2
L2
Y
Y
L4
L4
JDIO2 Definition
SIO_GPO70
SIO_GPO71
SIO_GPO72
SIO_GPO73
SIO_GPO74
M2B_SIM1
SIO_GPO75
SIO_GPO76
1
22
32
53
11
42
SIO_GPO77
+VDIO
GND
CPU1
Pin No.
Definition
2
GND
4
GND
10
10
10
10
10
JDIO2
1
10
JDIO1
6
1
37

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents