Main(Op Drv) Schematic Diagram - JVC GZ-MG27US Schematic Diagrams

MAIN(OP DRV) SCHEMATIC DIAGRAM

5 4
C4923
1µ
IC4902
1 2 3
MM1614GN-X
C4927
0.01µ
L4902
10µ
REG_4.9V_IC4901
REG_4.9V
NQL38DK-100X
L4901
NQR0129-002X
REG_3.1V
C4902
10/6.3
T
GND
L4904
NQL38DK-100X
L4903
10µ
TO MAIN IF(CN103)
M_REG4.9
NQL38DK-100X
C4932
10/10
T
GND
TO P.PRCS F/Z_RST
TO CDS/TG,P.PRCS CAM_CLK
TO P.PRCS OP_CS
TO CDS/TG,P.PRCS CAM_OUT
CLK27_AT
CAM_VD
TO P.PRCS
CAM_IN
IRIS_PS
HDIRS
TO MAIN IF IR_OUT
TL4901
TL4902
TL4903
TO V I/O ASPECT
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked ( ) is not used.
IC4903
R1100D311C-X
C4924
1u 1 2 3
C4925 C4926
1µ 1µ
C4903
10/10
T
REG_3.1V_IC4901
C4935 C4936
10/10 0.01
T
C4934
OPEN
N.C.
N.C.
N.C.
Dch
N.C.
N.C.
DVSS
C4905
0.1
DVDD(3V)
RETB
SCK
TEST0
TEST1
MONI0
TEST2
CS
SIN
CLK
VD
R4993
SOUT
470
PDWNB
R4925
100K
HD
PLS1
TL4914
PLS2
TL4915
R4944
MODESEL
0Ω
AVSS1
C4906
0.1
R4908
4.7k
R4907
1M
C4910
R4904 OPEN
R4905
10k
C4908 15k
C4909
0.1
R4903 0.01
8.2k R4906
C4907
560k
C4911
0.1
CH
100p
N.C.
ADIN1
Cch
ADIN2
MONI
DAC12
AVSS3
AVDD3(5V)
IC4901
N.C.
JCY0223-X
N.C.
AVSS2
AVDD2(5V)
N.C.
Ach Bch N.C.
N.C.
N.C.
C4933
OPEN
(No.YF133)2-25 2-26(No.YF133)
0 1 MAIN(OP DRV)
R4911
100
C4921
R4910
100
0.47u
R4950
R4949 12K
R4945
5.6K
OPEN
C4912
0.1
CH
R4924 12k
R4912
OPEN
OPEN
C4920
C4913
0.1
C4937
100p
OPEN
R4918
C4916
0.1
R4920
10k
yf133_y10612001a_rev0.1
Z_PTR_AD
OP_THRMO TO P.PRCS
F_PTR_AD
TO OP BLOCK
CN106
QGF0549C2-26W
14 DUMP+
15 GND
16 HGVcc+
17 HGout+
18 HGVss-
19 HGout-
20 DUMP-
21 DRIVE-
22 DRIVE+
23 GND
24 Z_PTR_AD
25 Z_VCC
26 Z_LED
10 ZOOM02
11 ZOOM03
12 ZOOM04
13 ZOOM01
7 F_PTR_AD
6 F_VCC
5 F_LED
8 OP_THRMO
9 GND
1 FOCUS02
3 FOCUS04
4 FOCUS01
2 FOCUS03