CommTech FASTCOM SuperFASTCOM Hardware Reference Manual page 22

TT constantly enabled – (default) for RS-422 communications
TT enabled only when RTS is on – turns off the transmit clock when it is not actively
sending data so that it does not contend with another transmitter on the clock bus
Offset 2 – These bits are for setting the transmit clock direction. The PEB20534 has only one
transmit clock pin that can be an input or an output using CCR0:TOE. If that pin is configured
to be an output, then it must be connected to a line driver. If that pin is configured to be an
input, then it must be connected to a line receiver. The ST pin is TxClk as an input and the TT
pin is TxClk as an output.
ST connected to TxClk – TxClk connected to the ST input pin. Never set CCR0:TOE=1
when setting this bit!
ST not connected to TxClk – (default) TxClk not connected to the ST input pin
TT connected to TxClk – (default) TxClk connected to the TT output pin
TT not connected to TxClk – TxClk not connected to the TT output pin.
Note: It is possible to configure the TxClk pin as an input TOE=0, and connect it to both the
TT and ST pins. This will allow the external clock from the ST pins to be outputted on the
TT pins.
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