Silicon Laboratories C8051F41 Series User Manual page 8

C8051F41x
4.4. Expansion I/O Connector (J1)
The 24-pin Expansion I/O connector J11 provides access to all signal pins of the C8051F410 device. A small
through-hole prototyping area is also provided. All I/O signals routed to connector J1 are also routed to through-
hole connection points between J11 and the prototyping area (see Figure 4 on page 6). Each connection point is
labeled indicating the signal available at the connection point. See Table 2 for a list of pin descriptions for J1.
8
Table 1. Target Board I/O Descriptions
Description
SW1 Reset
SW2
SW3
Green LED D3
Green LED D5
Red LED D1 VREGIN
Red LED D2
Red LED D12
Table 2. J1 Pin Descriptions
Pin # Description
1 P0.0
2 P0.1
3 P0.2
4 P0.3
5 P0.4
6 P0.5
7 P0.6
8 P0.7
9 P1.0
10 P1.1
11 P1.2
12 P1.3
Rev. 0.3
I/O Jumper
none
P1.4 J5[3–4]
P1.5 J5[7–8]
P2.1 J5[1–2]
P2.3 J5[5–6]
J24
VDD J23
VIO J33
Pin # Description
13 P1.4
14 P1.5
15 P1.6
16 P1.7
17 P2.0
18 P2.1
19 P2.2
20 P2.3
21
P2.4
22 P2.5
23 P2.6
24 P2.7