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Linear Technology DC1795A Demo Manual page 7

Ltc6950 1.4ghz low phase noise, low jitter pll with clock distribution

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Dc1795a reconfiguration
table 5. loop Filter selection for external oscillator (refer to ClockWizard's loop Design tab)
CloCkWizArD AnD boM Cross reFerenCe
DeFAult
oPtion
looP Filter tYPe
Filter 1 (Passive)
Filter 4 (Active)
typical Dc1795a reQuirements anD characteristics
PArAMeter
3.3V Power Supply
Charge Pump Power Supply
VCXO/VCSO Power Supply
+
LVDS/CMOS
, LVDS/CMOS
+
PECL0
, PECL0
+
PECL1
, PECL1
+
PECL2
, PECL2
+
PECL3
, PECL3
SYNC
STAT1, STAT2
Loop Bandwidth
VCO Power Supply
Active Loop Filter Supply
REF , External Reference
+
VCO
, VCO
, External VCO or
Input for clock distribution
CPOUT
* These values are for the "LTC6950_PECL0_250MHz" file and the default on board VCO and Reference.
** Any unused RF output must be powered down or terminated with 50Ω, or poor spurious performance may result.
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rz
Ci
RZ_P
CI1_P + CI2_P
RZ_A
CI1_A + CI2_A
inPut or outPut
PhYsiCAl loCAtion
Input
J2 BNC connector, or
+
V
Input
J1 BNC connector, or
Input
Two Outputs
J19 and J18 SMA connectors**
Two Outputs
J17 and J16 SMA connectors**
Two Outputs
J13 and J12 SMA connectors**
Two Outputs
J8 and J7 SMA connectors**
Two Outputs
J11 and J10 SMA connectors**
Input
SYNC turret or J9 SMA connector EZSync, 0V to 3.3V control signal, refer to the data sheet
Output
STAT1 and STAT2 turret
-
Set by loop filter component values 4.2kHz*
Input
Input
Input
Input
J14 and J15 SMA connectors
Output
DEMO MANUAL DC1795A
other MoDiFiCAtions
CP
instAll
DePoPulAte
CP_P
R68
(0402 0Ω)
CP_A
R67, R69
(0402 0Ω)
DetAils
Low-noise and spur-free 3.3V,
= 3.15V to 3.45V turret
500mA default (200mA configured*).
Powers LTC6950, U6, U7, U8 and U9
Low-noise and spur-free 5V, 35mA*.
+
V
to 5.25V turret
Powers LTC6950 and provides common mode to U2
+
V
VCXO turret
Low-noise and spur-free 5V, 20mA*. Powers U4
DC coupled, 250MHz, (if enabled)*.
Refer to LTC6950 data sheet for output levels for LVDS and
CMOS option.
AC coupled, 250MHz, 800mV
Must have LTC6950's IBIAS0 = H with default BOM. DC1795A
has options for an external pull down resistor if IBIAS0 = L.
AC coupled, 250MHz, 800mV
have LTC6950's IBIASX = H with default BOM. DC1795A has
options for an external pull down resistor if IBIASX = L.
STAT1 GREEN LED, if ON LTC6950 is locked*.
STAT2 RED LED, if ON indicates issue*.
Refer to the troubleshooting section and data sheet
+
V
VCO turret
Board Modifications required for use, see Table 2
+
V
OA turret
Board Modifications required for use, see Table 2
J4 SMA connector
Board Modifications required for use, see Table 1
Board Modifications required to use External VCO.
See Tables 2 and 5. Clock Distribution, see Table 2 only
CPOUT Turret
Used with External VCO, connect to external VCO's V
voltage
CoMMents
R72
Connect CPOUT turret to V
external oscillator
R70, R72
Select CPINV under the ClockWizard
System tab. Connect CPOUT turret to
V
of external oscillator
TUNE
differential*.
P
differential (if enabled)*. Must
P
of
TUNE
TUNE
dc1795af
7

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