Diagrams; Block Diagram - Audio Input Section (Xdp-Mu100) - Sony XDP-PK1000 Service Manual

XDP-PK1000
SECTION 5

DIAGRAMS

5-1.

BLOCK DIAGRAM - AUDIO INPUT Section (XDP-MU100) -

CN301 (1/2)
CRADLE
8
9
7
(Page 12)
(Page 12)
(Page 11)
(Page 12)
CN402
HIGH LEVEL
INPUT
FRONT_L+
FRONT_L–
FRONT_R+
FRONT_R–
REAR_L+
REAR_L–
REAR_R+
REAR_R–
XDP-PK1000
D+
D–
VBUS-USB
USB_VBUS
SYSTEM CONTROLLER
IC202 (1/3)
MC_RX 22
MC_TX 24
PWR_INFO 37
CD_ON 26
WAKEUP 25
ZMUTE 21
VBUS_ON 27
SYSRST 20
OE_IN 74
A RESET
B
BU_IN
C
A_ATT
D
CDON_CHECK
HIGH LEVEL
INPUT DETECT
Q407
BU +5V
D401
R-CH D402
D404
D403
8
4
7
3 R-CH
6
2
5
1 R-CH
iPod/iPhone CONTROLLER
IC703
79 D+
DEC_DATA 93
80 D– DEC_BCK 92
DEC_BCKIN 91
DEC_LRCK 90
DEC_GATE 31
DEC_REQ 5
DEC_INT 29
DEC_XMUTE 30
DEC_SSTBY 28
87 TxD
88 RxD
CD_BUS0 18
CD_BUS1 19
CD_BUS2 20
3 PWR_INFO
CD_BUS3 21
50 CDON
CD_BUCK 22
CD_XRST 24
4 WAKEUP
CD_XCCE 23
51 ZMUTE
CD_ZDET 25
78 VBUS_ON
1 RESET
D202
CP_RESET 89
SPI_CLK 86
SPI_SOMI 85
2 BU_IN
SPI_MISO 84
48 A-ATT
CPON 34
53 CDON_CHECK
CDON_1500MV 33
HIGH LEVEL INPUT
CENTER VOLTAGE
ON/OFF CONTROL
IC403
Q409 - 411
AU +8.5V
DIFFERENCE AMP
IC412
DIFFERENCE AMP
IC411
10 10
DIGITAL SIGNAL CONVERTER
IC605
90 BSIF_DATA PIO15/SDO0 45
91 BSIF_BCK
PIO18/LRCK0 48
92 BSIF_LRCK PIO19/BCK0 49
89 BSIF_GATE
88 BSIF_REQ
87 DEC_REQ
93 DEC_XMUTE
37 /SRAMSTB
XO 67
X601
77 BUS0
16.934MHz
XI 66
78 BUS1
79 BUS2/So
80 BUS3/Si
81 BUCK/SCL
85 /RST
82 /CCE
94 ZDET
EEPROM
IC702
B+ SWITCH
Q705, 706
4 NRESET
14 MODE0/SPI_CLK
13 SPI_SOMI
IC605 VDDM1 REGULATOR
12 SPI_SIMO
IC605 VDD1 REGULATOR
A/D CONVERTER
IC407
DOUT 9
13 VIN_L
BCK 8
R-CH 14 VIN_R
LRCK 7
SCKI 6
A/D CONVERTER
IC408
DOUT 9
13 VIN_L
BCK 8
R-CH
14 VIN_R
LRCK 7
SCKI 6
SDIN_O
E
(Page 11)
LRCLK_O
BCK_O
R-ch is omitted due to same as L-ch.
SIGNAL PATH
: AUDIO
: iPod/iPhone
BU +3.3V
+1.5V
IC602
+1.5V
IC603
ADOUT_1
BCK
LRCK
MCK
F
(Page 11)
ADOUT_2