[D175F] Block Diagram - Clock
XTAL_19M_IN
19.2MHz
19 2MH
XTAL_19M_OUT
LGE Internal Use Only
PM8110
(PMIC)
BB_CLK_EN
BB_CLK
SLEEP_CLK
SPMI_CLK
RF_CLK1
RF CLK1
RF_CLK2
MSM8x10
(AP+CP)
EBI_CLK
EBI CLK
EBI_CLKB
SDC1_CLK
SDC2_CLK
CXO_EN
CXO
USB_HS_SYSCLK
SLEEP_CLK
MIPI_DSI_CLK_P
MIPI_DSI_CLK_N
PMIC_SPMI_CLK
MIPI_CSI0_CLK_P
MIPI_CSI0_CLK_N
GPIO13/MAIN_CAM0_MCLK
GPIO37/UIM1_CLK
GPIO33/UIM2_CLK
GPIO95/UIM3_CLK
GPIO89/1SEG SPI CLK
GPIO89/1SEG_SPI_CLK
GPIO27/WLAN_CLK
WTR2605
XO IN
XO_IN
WCN3620
(BT/WLAN/FM)
TCXO_IN
WLAN_CMD_CLK
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Copyright © 2014 LG Electronics. Inc. All right reserved.
5. BLOCK DIAGRAM
LPDDR2 4Gb
LPDDR2 4Gb
eMMC 4GB
3.5" HVGA
(480X320)
26MHz
DTV
DTV
Only for training and service purposes