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There are two ways to start the transmit operation:
•
Send the transmit command and the number of bytes to be transmitted first, and then start to send the
data to the FIFO. The transmission starts when first data byte is written into the FIFO.
•
Load the number of bytes to be sent into registers 0x1D and 0x1E and load the data to be sent into the
FIFO (address 0x1F), followed by sending a transmit command (see Direct Commands section). The
transmission then starts when the transmit command is received.
If the data length is longer than the FIFO, the external system MCU is warned when the
majority of data from the FIFO was already transmitted by sending and interrupt request with
flag in IRQ register to indicate a FIFO low or high status. The external system should
respond by loading next data packet into the FIFO.
At the end of a transmit operation, the external system MCU is notified by interrupt request (IRQ) with a
flag in the IRQ register (0x0C) indicating TX is complete (example value = 0x80).
6.11 Transmitter – External Power Amplifier or Subcarrier Detector
The TRF7962A can be used in conjunction with an external TX power amplifier or external subcarrier
detector for the receiver path. If this is the case, Bit B6 of the Regulator and I/O Control register (0x0B)
must be set to 1. This setting has two functions: First, to provide a modulated signal for the transmitter, if
needed. Second, to configure the TRF7962A receiver inputs for an external demodulated subcarrier input.
The design of an external power amplifier requires detailed RF knowledge. There are also readily
designed and certified high-power HF reader modules on the market.
6.12 Communication Interface
6.12.1 General Introduction
The communication interface to the reader can be configured in two ways: with a eight line parallel
interface (D0:D7) plus DATA_CLK, or with a 3- or 4-wire Serial Peripheral Interface (SPI). The SPI
interface uses traditional master out/slave in (MOSI), master in/slave out (MISO), IRQ, and DATA_CLK
lines. The SPI can be operated with or without using the slave select line.
These communication modes are mutually exclusive, which means that only one mode can be used at a
time in the application.
When the SPI interface is selected, the unused I/O_2, I/O_1, and I/O_0 pins must be hard-wired according
to
Table
6-6. At power up, the TRF7962A IC samples the status of these three pins and then enters one
of the possible SPI modes in
samples the status of these three pins. If they are not the same (all high or all low), the IC enters one of
the possible SPI modes.
The TRF7962A always behaves as the slave, while the microcontroller (MCU) behaves as the master
device. The MCU initiates all communications with the TRF7962A. The TRF7962A makes use of the
Interrupt Request (IRQ) pin in both parallel and SPI modes to prompt the MCU for servicing attention.
Table 6-6. Pin Assignment in Parallel and Serial Interface Connection or Direct Mode
PIN
PARALLEL
DATA_CLK
DATA_CLK
I/O_7
A/D[7]
I/O_6
A/D[6]
(1) MOSI = Master out, slave in
(2) MISO = Master in, slave out
Copyright © 2011–2020, Texas Instruments Incorporated
Table
6-6.
PARALLEL DIRECT
DATA_CLK
Direct mode, data out
(subcarrier or bit stream)
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Product Folder Links:
SLOS757G – DECEMBER 2011 – REVISED MARCH 2020
NOTE
SPI WITH SS
DATA_CLK from master
(1)
MOSI
= data in (reader in)
(2)
MISO
= data out (MCU out)
TRF7962A
TRF7962A
SPI WITHOUT SS
DATA_CLK from master
(1)
MOSI
= data in (reader in)
(2)
MISO
= data out (MCU out)
Detailed Description
23
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