Setting Fifo Control - Black Box IC128C-R3 Manual

Pc plus adapter dual serial pci
Hide thumbs Also See for IC128C-R3:
Table of Contents

Advertisement

5.1.3 S
ETTING
Each of the Adapter's two ports incorporates a 32-byte
FIFO (first-in-first-out) buffer.
The FIFO control tabs set the buffer "trigger" levels.
When the buffer is filled to its trigger level with the
selected number of bytes, the CPU will be interrupted
and asked to either reload the buffer (for transmission),
or retrieve data from the buffer (for reception).
Most efficient data transmission occurs when the CPU
is interrupted infrequently. For each interrupt, the CPU
can then service the buffer with larger data blocks:
During transmission, it can place a large burst of data
into the buffer, and during reception it can retrieve a
large block from the buffer and then continue multi-
tasking.
Ideally, therefore, Receive triggers should be set as
high as possible and Transmit triggers as low as possible.
However, if the Transmit trigger levels are set too low,
or Receive triggers too high, and the CPU is busy when
an interrupt is called by the Adapter, a short period of
inactivity may occur between the port and the modem.
This will reduce effective transmission/reception speeds.
FIFO C
ONTROL
CHAPTER 5: Software Installation
17

Advertisement

Table of Contents
loading

Table of Contents