Schematic Diagram - Tft Board (5/8) (Xav-Ax200) - Sony XAV-AX200 Service Manual

2018/04/20 05:09:38 (GMT+09:00)
XAV-AX200/AX200C2
XAV-AX200/AX200C2

5-21. SCHEMATIC DIAGRAM - TFT Board (5/8) (XAV-AX200) -

1 2
TFT BOARD (5/8)
A
[7]
B
DGND
1uF
GPS_G
C2
[1]
4K7
[2,5]
MLV_3V3
R85
1
GIN1
R69 75R
2
GIN2
3
1uF AVDD
GPS_B
4
C31
AGND
[1]
5
BIN1
R86 4K7
6
[2,5] MLV_3V3 BIN2
C144 7
REF
10nF
C48 8
REFP
224
9
REFN
C
10
C104
AGND
11
TAOUT
224
12
RIN1
C105 R87 4K7
13
RIN2
224
14
AVDD
15
C1
AGND
GPS_R
16
1uF CSYNC_A
[1]
R63
75R
MLV_3V3
[2,5]
C100
C96 C97 C98 C99
104 104 104 104 104
DGND
D
DGND
R220
[1]
GPS-SYNC
0R
1K
R73
C367
E
1
2
3
4
NF_RDY3
5
NF_RDY2
6
[5] NF_RDY1
7
[5] NF_R/B1
8
[5] NF_/RE
9
[5] NF_/CE0
10
NAND_CS1
C264
11
NAND_3V3
12
[3,5]
F NC
13
14
NF_CS2
15
NF_CS3
16
[5] NF_AE
17
[5]
NDF_CE
18
[5] NF_/WE
19
[5] NF_/WP
20
21
22
23
24
R170
F
[5] NF_R/B1 NF_RDY1 [5]
3 4
NC
R305
C364
C146 C145
NC
X2
15pF 4 2 15pF
3 1
C365
32MHz NC
R74
680R DGND
R62 1M
R1 4K7
[2,5]
MLV_D_3V3
R221 1K
C24
104
C393
NC
48
RESETN
R88 33R
47
CLKO 656_IN_CLK
46
[2,5] [6]
DVDD_IO MLV_D_3V3
45
DGND DGND RN9 33Rx4
44
DVDD_C C_1V5 [2,5] 656_IN_D0 [6]
43
DO7
[6]
656_IN_D1
42
DO6
41 656_IN_D2
DO5 [6]
40
DO4 656_IN_D3
[6]
39
DO3
38
DO2 [6]
656_IN_D4
37
DO1
656_IN_D5 [6]
36
DO0
35 656_IN_D6
VSYNC_L [6]
34
HSYNC_L 656_IN_D7
[6]
33
FID RN10 33Rx4
[2,5]
MLV_3V3
C154 C158 C155 C156
C186 C320 C321 C300 C301 C159 C322 C323 C324
104 104 104 104 10uF 10uF 10uF 104 104 104 103 103 103
DGND GND
TP20
NAND_3V3
[3,5]
C265 C266
104 104
U16
0
0
48
NC NC
1
47
NC NC
46 0
NC NC
45
R/B4 NC RN7 0
44
R/B3 D7 NF_D7 [5]
1
43
R/B2 D6
[5]
NF_D6 1
42
R/B1 D5
41 NF_D5 [5]
/RE D4 1
40
/CE0 NC NF_D4 [5]
39
/CE1 NC 33Rx4
38
NC NC
37 0
VCC VCC NAND_3V3 [3,5]
36
1
VSS VSS
35
/CE3 NC
1
34
/CE4 NC
33 RN12
CLE NC
32 NF_D3 [5]
ALE D3
31
/WE D2 NF_D2 [5]
30
/WP D1
[5]
NF_D1
29
NC D0
[5]
28 NF_D0
NC NC
27 33Rx4
NC NC
26
NC NC
25
NC NC
44 44
5 6 7
CORE_3V3
[3,5,6,7]
0R
R300
[5] NF_R/B1
0R
R301
[5] NF_/RE
0R R302
[5] NF_/CE0
C4 H2
NAND_RDY UA0_TX/GPIO[91]
C5 F4
RN14 NAND_RE_B UA0_RX/GPIO[92]
C6
[5] NAND_CE0_B
NF_AE
D5 H17
NAND_CLE UA1_TX//GPIO[85]
[5] NDF_CE
D6 G18
NAND_ALE UA1_RX/GPIO[86]
[5] NF_/WE E1
NAND_WE_B
E2 R21
[5] NF_/WP NAND_WP_B UA2_TX/GPIO[49]
E4 R20
[5]
10Rx4 NF_D7 NAND_D[7] UA2_RX/GPIO[50]
E5
[5] NAND_D[6]
NF_D6
F1 N21
[5] NF_D5 NAND_D[5] UA4_TX/GPIO[61]
F2 N20
[5]
NF_D4 NAND_D[4] UA4_RX/GPIO[62]
F3 M21
[5]
NF_D3 NAND_D[3] UA4_CTS/GPIO[63]
G2 M20
[5] NAND_D[2] UA4_RTS/GPIO[64]
NF_D2
G3 L22
[5] NF_D1 NAND_D[1] GPIO[65]
H1
[5] BT
NF_D0 NAND_D[0]
R19
UA5_TX/GPIO[51]
N22 R18
BT_PCM_DI/GPIO[60] UA5_RX/GPIO[52]
N18 P21
BT_PCM_DO/GPIO[59] UA5_RTS/GPIO[53]
N19 P22
BT_PCM_CLK/GPIO[58] UA5_CTS/GPIO[54]
TP24
P17 R17
BT_PCM_SYN/GPIO[57] GPIO[55]
P18
INT/GPIO[56]
Always On
F5 L4
SPI_CE CFG6/GPIO[6]
F6 L3
SPI_D[1] CFG5/GPIO[5]
[3,5,6,7] G5 K5
SPI_D[2] CFG4/GPIO[4]
CORE_3V3
G6 K4
SPI_D[0] CFG3/GPIO[3]
R118 H4 J5
SPI_CLK CFG2/GPIO[2]
R154
10K
H5 J4
SPI_D[3] CFG1/GPIO[1]
J3
IR/GPIO[0]
L1
PWR_EN
RST_CORE
L2
RESET_B
R153 100R L6
[1]
VDD33_IOP
J2 M6
XTAL_IN VDD10_IOP
C35
J1 K6
XTAL_OUT X32CK_AVDD
K2 J6
104
X32CK_IN X32CK_AVSS
K1
X32CK_OUT
R135
0R
R127
1M
3 1
4 2
X4
C196 C199
27M
22pF 27MHZ 22pF
Pull High at power up for normal boot
HW_CFG2/4/5/6 for boot source selection
Boot Mode
0 0 Auto Scan
1 0 SPI_NAND
1 1 NAND
0 1 SD CARD ISP
1 1 UART_ISP
1 0 USB_ISP
0 0
SPI_NOR_X2
0 1 SPI_NAND_X2
Boot Mode
1 0 SPI_NAND
1 1 NAND
1 0 USB_ISP
8
Debug
CON10
1
R308 100R
2
3
100R
R307 4
4Pin-2.0
R116 33R
[1]
DAB_RX
R102
33R
[1]
DAB_TX
MCU
UA2_TX [1]
[1]
UA2_RX
UA4_RX [1]
[8]
UA5_TX
[8]
UA5_RX
[8]
UA5_CTS
R309 10K
UA5_RTS
CORE_3V3
GPIO55 [8]
[3,5,6,7]
[1]
GPIO56
HW CFG
[1,5]
HW_CFG4
HW_CFG3
[1,5]
HW_CFG2
HW_CFG1
IVMX2
R192
CORE_3V3
IR_IN
[3,5,6,7]
10K
[3]
IOP_3V3
R139
[3,4]
CORE_1V1
C192 C197
104 10uF
[3,5,6,7] [3,5,6,7]
CORE_3V3 CORE_3V3
[1,5] [1,5]
HW_CFG2 HW_CFG4
SYS SET