Laird BT830-SA Hardware Integration Manual page 14

Bluetooth v4.0 dual-mode uart hci module
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BT830 Hardware Integration Guide
Version 1.3
PCM Interface Master/Slave
When configured as the master of the PCM interface, the BT830 generates PCM_CLK and PCM_SYNC.
Figure 2: PCM Interface Master
Figure 3: PCM Interface Slave
Long Frame Sync
Figure 4: Long Frame Sync (shown with 8-bit Companded Sample)
Long Frame Sync indicates a clocking format that controls the transfer of PCM data words or samples. In Long Frame
Sync, the rising edge of PCM_SYNC indicates the start of the PCM word. When the BT830 is configured as PCM
master, generating PCM_SYNC and PCM_CLK, then PCM_SYNC is eight bits long. When the BT830 is configured as
PCM Slave, PCM_SYNC is from one cycle PCM_CLK to half the PCM_SYNC rate.
BT830 samples PCM_IN on the falling edge of PCM_CLK and transmits PCM_OUT on the rising edge. PCM_OUT is
configurable as high impedance on the falling edge of PCM_CLK in the LSB position or on the rising edge.
Embedded Wireless Solutions Support Center:
14
Laird Technologies
http://ews-support.lairdtech.com
Americas: +1-800-492-2320
Europe: +44-1628-858-940
www.lairdtech.com/bluetooth
Hong Kong: +852-2923-0610

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