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Summary of Contents for Cypress AN204772
- Page 1 The following document contains information on Cypress products. The document has the series name, product name, and ordering part numbering with the prefix “MB”. However, Cypress will offer these products to new and existing customers with the series name, product name, and ordering part number with the prefix “CY”.
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Page 2: Table Of Contents
Quartz Crystal Placement and Signal Routing .......... 8 Introduction This application note describes how to set up a hardware environment for Cypress 16FX MCUs. As an example the MB96F34x MCU is used. Minimal System This Chapter Gives an Example of a Minimum Hardware System www.cypress.com... -
Page 3: Schematic
The analog converter supply pins (AVcc, AVss, AVRH, AVRL) should be connected even if the ADC of the MCU is not used. Please refer to our application note mcu-an-300215-e-16fx_adc for using the ADC and pin connection. www.cypress.com Document No. 002-04772 Rev. *B... -
Page 4: Analog Input Pins
Because the ADC works with an internal sample capacitor the input impedance and external capacity must be low. Cypress recommends an input impedance of not more than 15k Ohm. Choose the external capacity as low as possible (about 1 nF for EMI protection). -
Page 5: Layout And Electromagnetic Compatibility
In general the Vcc and Vss lines should not be routed in “chains”, but in “star shape”. For Vss a ground plane is recommended which covers the chip package, and is connected in one point to Vss of the whole circuit. Below is a example of a bad and a good power line routing: www.cypress.com Document No. 002-04772 Rev. *B... -
Page 6: C Pin Decoupling
The following routing and placement for double sided metal layer is recommended. Note, that despite the capacitors are placed on the opposite side as the MCU, this solution is the best. www.cypress.com Document No. 002-04772 Rev. *B... -
Page 7: Power Supply Decoupling
For EMI reasons all decoupling capacitors should have the same capacitance, so that all have a common resonance frequency. Cypress recommends 10nF (~100 MHz resonance) to 100nF (~10 MHz resonance) depending on application. For further detailed information please refer to the application note 16bit-EMC-Guideline. - Page 8 The following routing and placement for double sided metal layer is recommended. Note, that despite the capacitor is placed on the opposite side as the MCU, this solution is the best like for the C pin. If mounting on both sides is not possible the following placement and routing is recommended: www.cypress.com Document No. 002-04772 Rev. *B...
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Page 9: Quartz Crystal Placement And Signal Routing
For single metal layer circuit board the following placement and signal routing is recommended: For double sided metal layer layout the following is recommended: Other documents For further detailed information please refer to the application note 16bit-EMC-Guideline. www.cypress.com Document No. 002-04772 Rev. *B... -
Page 10: Mcu Pin Summary
Oscillator input, if not used so shall be connected with pull-up or pull-down resistor (see please DS) Oscillator output, the crystal and bypass capacitor must be connected via shortest distance with X1 pin, if X1, X1A* not used so shall be open *only if supported by device www.cypress.com Document No. 002-04772 Rev. *B... -
Page 11: Port Input / Unused Pins / Latch-Up
All pins are set to input disabled after its power-on default. Do not connect any input ports directly to VCC or VSS (GND)! Always use pull up or down resistors (2k … 4k Ohms). www.cypress.com Document No. 002-04772 Rev. *B... -
Page 12: Latch-Up Consideration (Switch)
An equivalent circuit diagram looks like the following illustration: By closing the switch SW at time t the following voltage can be measured at point (A): But at the port pin Pxy on point (B) the following voltage can be measured: www.cypress.com Document No. 002-04772 Rev. *B... - Page 13 These overshoots may cause an internal latch-up on the port pin, because the internal clamping diode connected to becomes conductive. Similar is the effect, if the switch SW is opened. In this case there are under shoots on the port pin. www.cypress.com Document No. 002-04772 Rev. *B...
- Page 14 This solution has two disadvantages: First the debouncing effect decreases and second, there is no guarantee, that the latch-up condition is eliminated. A better solution is to use a series resistor at the port pin like in the following schematic: www.cypress.com Document No. 002-04772 Rev. *B...
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Page 15: Minimum Flash Programming Connection
Reset (RSTX). The other pins are the communication pins of the USART (SINn, SCKn, SOTn). In the examples below USART0 is used. Please refer to the Application Note mcu-an-300224-e- 16fx_mcu_flash_prog_bi_rom for which USARTS can be used for programming. www.cypress.com Document No. 002-04772 Rev. *B... -
Page 16: Asynchronous Programming
MCU is in serial programming mode then. If USART scanning is enabled, the programmer connection to MD0 can be removed. Synchronous Programming The following schematic shows a possible configuration: *1 please see chapter 6 for details www.cypress.com Document No. 002-04772 Rev. *B... -
Page 17: External Watchdog During Flash Programming
Connector at *2 can be removed with the connector chassis, if the ground levels of MCU board and programmer do not have a voltage pitch or shift. Additionally the MD0-ground connection can be removed, if USART scanning is enabled. www.cypress.com Document No. 002-04772 Rev. *B... - Page 18 T i m i n g D i a g r a m o f P r o g r a m m i n g M o d e Note: The capacitor on the D-pin now is completely charged to 5 Volts, so that the power on reset time becomes shorter. www.cypress.com Document No. 002-04772 Rev. *B...
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Page 19: Background Debugging Usart
Termination to system ground is not recommended, because the USART may interpret this as a start bit condition even if no falling edge occurred. Note: If synchronous communication mode (not supported yet) is used, the same appears to the corresponding SCK pin. www.cypress.com Document No. 002-04772 Rev. *B... -
Page 20: Document History
F²MC-16FX Family, Hardware Set Up Document History Document Title: AN204772 - F²MC-16FX Family, Hardware Set Up Document Number: 002-04772 Revision Orig. of Submission Description of Change Change Date 08/17/2006 Initial Release 02/20/2007 Latch-up diagram corrected 02/22/2007 C-pin with single ceramic capacitor X7R... - Page 21 Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products.
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