Debug In; Figure 11. Ek-Ra6M3 Board Debug Interface; Table 6. Debug In Mode Jumper Configuration; Table 7. Jtag/Swd/Trace Connector - Renesas RA6 Series User Manual

Renesas RA Family

5.2.2 Debug In

®
One 20-pin Cortex Debug Connector at J20 supports JTAG, SWD, and ETM (TRACE) debug. One 10-pin
®
Cortex Debug Connector at J13 supports JTAG and SWD. Either of these connectors may be used for
external debug of the target RA MCU.
To configure the EK-RA6M3 board to use the Debug in mode, configure the jumpers using the following
table.

Table 6. Debug In Mode Jumper Configuration

Location Default Open/Closed
J8 Jumper on pins 1-2
J9 Jumper on pins 1-2
J29 Jumpers on pins 1-2, 3-4, 5-6, 7-8

Table 7. JTAG/SWD/TRACE Connector

JTAG Connector
Pin JTAG Pin
Name
J20-1 Vtref
J20-2 TMS
J20-3 GND
J20-4 TCK
J20-5 GND
J20-6 TDO
J20-7 Key
J20-8 TDI
J20-9 GNDDetect
J20-10 nSRST
J20-11 N/A
R20UT4629EU0101 Rev.1.01
Jan.30.20

Figure 11. EK-RA6M3 Board Debug Interface

Function
Target RA MCU RESET# connected to debug RESET#
S124 Debug MCU is held in RESET
Target RA MCU debug signals connected to the Debug Interface
ETM Pin Name
SWD Pin Name
Vtref Vtref
SWDIO N/A
GND GND
SWCLK N/A
GND GND
SWO N/A
Key Key
NC/EXTb N/A
GNDDetect GNDDetect
nSRST nSRST
N/A N/A
EK-RA6M3G v1 – User's Manual
EK-RA6M3
Signal/Bus
+3V3
P108/SWDIO (U1-89)
GND
P300/SWCLK (U1-88)
GND
P109/TDO (U1-90)
N.C.
P110/TDI (U1-91)
GND (cut E30 to open)
RESET#
N.C.
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