Racal Instruments 7064 Instruction Manual page 59

5.2.1.2 C o n t r o l Register
5.2.1.2.1 T h e Control register is reset at power-up by a buffered version of the SYSRESET
signal from the backplane (SYSRST*). The breadboard provides the reset bit out
of the Control register at E23. This can be used to drive other circuitry that is
dependent on this bit.
This is not the same as the SYSRESET bit from the backplane. I t is a bit the
system controller uses to force a device into a reset state (the SYSRST* signal
is provided at P11C26).
5.2.1.2.2 Typically, an instrument would be reset by either SYSRST* being low or the
Control register reset bit being high. See the example circuit below. Another bit
in the Control register is SYSFAIL INHIBIT. This bit is found at E24. The
SYSFAIL INHIBIT is used by the system controller to disable driving the
SYSFAIL line on the backplane even though the local board might have a fail
condition. The most significant bit defined in the Control register is A24/A32
ENA. This bit is available at E30. This is generally used to tell a device whether
to allow accesses in memory spaces other than A16. This bit would be used i f
A24 or A32 VXI memory was going to be put on the instrument. The breadboard
also has five device dependent bits available (bits 2 through 6) from the Control
register which appear at E25 through E29. The instrument designer can use these
bits for whatever purpose is desired. Writes to the Control register affect these
bits. If even more bits are desired, the designer can use a single chip to implement
the rest of the device dependent bits of the Control register:
INSTRUMENT RESET
5-2
NOTE
,09 I . , ' '4101
- 0 1 0
i 0 1 2
E.D13
: - 1 1 4
'S.TP PEEP".
, 1 C : 5 )
V X I CONTROL REGISTER EXPANSION
6 • C O N T R O L 8
CO I C
•
50
. 1 4 0 ' 0
, 3 D I D
; ' , " . 1 1 . ! 2 D " t D
r-MA.
> C L K
C , R
CONTROL 9
CONTROL ! O
CONTROL •
CONTROL 1 2
CONTROL
CONTROL