There are 8 MUX configurations to designate the analog voltage inputs to the ADC of the ADS1015, shown in the
table below. The default configuration of the ADS1015 uses inputs AIN and AIN as highlighted in bold in the
table below.
Inputs
AIN
AIN
p
0
AIN
AIN
N
1
Programmable Gain Amplifier
A programmable gain amplifier (PGA) is implemented before the ΔΣ ADC. The ADS1015 has 6 programmable
gain settings, which are expressed in the full-scale range (FSR) of the ADC scaling. The maximum analog
measurement is then defined by the smaller of the FSR or V
by using an FSR of ±2.048V as highlighted in bold in the table below.
Gain:
Resolution (LSB):
FSR (12-bit):
Analog-to-Digital Conversion
Although, it is listed as a 12-bit ADC, the ADS1015 operates as an 11-bit ADC when used with single-ended
(individual) inputs. The 12th bit only comes into play in differential mode, as a sign (+ or -) indicator for the digital
output. This allows the digital output to represent the full positive and negative range of the FSR (see table and
figure below).
Operational digram of multiplexer from datasheet.
Differential
AIN
AIN
0
1
AIN
AIN
3
3
16
8
0.125 mV
0.25 mV
±256 mV
±512 mV
0
MUX Configurations
AIN
AIN
2
0
AIN
GND
3
. By default, the ADS1015 has a resolution of 1mV
DD
4
0.5 mV
1 mV
±1.024 V
±2.048 V
1
Single-Ended
AIN
AIN
1
2
GND
GND
2
1
2 mV
±4.048 V
AIN
3
GND
2
/
3
3 mV
±6.144 V
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