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Marantz AV8003 Service Manual page 108

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IC51 : R5F21248SNFP [DMP CPU]

Pin No

Port Name

1

NC

2

P3_5/SCL/SSCK

3

P3_3/SSI

4

P3_4/SDA/SCS

5

MODE

6

P4_3/XCIN

7

P4_4/XCOUT

8

~Reset

9

XOUT/P4_7

10

VSS

11

P4_6/XIN

12

VCC

13

P2_7/TRDIOD1

14

P2_6/TRDIOC1

15

P2_5/TRDIOB1

16

P2_4/TRDIOA1

17

P2_3/TRDIOD0

18

P2_2/TRDIOC0

19

P2_1/TRDIOB0

P2_0/TRDIOA0/

20

TCLK

21

P1_7/TRAIO/INT1

22

P1_6/CLK0

P1_5/

23

RXDO(TRAIO)

24

P1_4/TXDO

25

P1_3/KI3/AN11

26

NC

27

P4_5/INT0

28

P6_6/INT2/TXD1

29

P6_7/INT3/RXD1

30

P1_2/KI2/AN10

31

P1_1/KI1/AN9

32

P1_0/KI0/AN8

33

P3_1/TRB0

34

P3_0/TRA0

35

P6_5/CLK1

36

P6_4

37

P6_3

38

P0_7/AN0

39

NC

40

NC

41

P0_6/AN1

42

P0_5/AN2

43

P0_4/AN3

44

P4_2/VREF

45

P6_0/TRE0

46

P6_2

47

P6_1

48

P0_3/AN4

49

P0_2/AN5

50

P0_1/AN6

51

P0_0/AN7

52

P3_7/SSO

I/O

Use STBY

NC

-

-

I/O

I

-

DMP_CPU_IICCLK

I/O

O

-

RS232C_SW3

I/O

I/O

-

DMP_CPU_IIC_DATA

I

I

-

DMP_CPU_MODE

I/O

I

-

DMP_CPU_READREQ

I/O

I

-

I

I

-

DMP_CPU_RESET

O

I

VCC

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I

I

-

DMP_UART_RX

O

O

-

DMP_UART_TX

I

I

-

DMP_PROTECT

-

I/O

I

-

O

O

-

DMP_CPU_TXD

I

I

-

DMP_CPU_RXD

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

-

-

I/O

I

-

I/O

I

-

I/O

I

-

I

I/O

I

-

I/O

I

-

I/O

O

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

I/O

I

-

Port Setup

Name

Act.

NC

-

-

H

-

-

L

NC

-

L

20MHz

-

VSS

-

20MHz

-

VCC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

-

-

H

NC

-

NC

-

-

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

NC

-

VREF

-

NC

-

NC

-

DMP_PON

H

NC

-

NC

-

NC

-

NC

-

NC

-

144

Note

Init

-

IIC Serial Clock

-

Communication Clock line to Main CPU

Control to Firmware update

L

L : RS232C Update (Normal)

H : Network Update

IIC data

-

Communication Clock line to Main CPU

Mode terminal, when program is

-

rewritten: L

Reserve

-

(IIC Request signal)

-

-

Reset input

-

Clock frequency 20MHz

-

Grand level

-

Clock frequency 20MHz

-

+5V

-

-

-

-

-

-

-

-

-

-

UART terminal for DMP communication

-

H

UART terminal for DMP communication

DMP module power supply state

confirmation

-

Module inside power supply

Short detection

-

-

Terminal UART-RX for program

H

rewriting.

Terminal UART-RX for program

-

rewriting.

-

-

-

-

-

-

-

-

-

-

-

-

-

-

-

A./D reference voltage

-

-

DMP module power supply

L

L : Stop H : Operation

-

-

-

-

-

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