HP 13255 Technical Information page 22

13255
Cartridge Tape Module
13255-91032/20
Rev AUG-01-76
3.0.4.3 The encoder operation can be best explained by considering the record-
ing of a gap and a 2-byte preamble. The preamble consists of a zero
byte and a byte with the value 200 octal.
First, the command RUN.FOPWARD.RECQRD.GAP Is output to the command
register from the processor. This sets the encoder to record flux
in the gap direction. Additionally, the command sets the mOdulus
of the variable mOdulus counter to 77 and enables the preset signals of
the variable modulus, bit, and cell decode counters. While the gap is
being recorded, the serial data register is shifted right for each bit
time. Since
DZX
is set when in record mode, this results in the serial
data register being loaded serially with all 1'5. Because the data
register contains the complement data, the register 15 effectively
loaded with the first preamble byte (all zeroes).
After the proper gap interval has been recorded, the GAP command is
turned off and/the last preamble byte is loaded into the data
1/0
buffer. When REC GAP is set, the preset Signals on the variable
modulus, bit, and cell decode counters are removed and the encoder is
no longer forced to record in the gap direction.
Each bit is recorded (encoded) as follows:
1) The variable modulus CDunter counts up and generates a carry
output (CIN) every 77 system ClOCKS. The carry output incre-
ments the cell deCOde counter.
2) Tne cell dpcode counter is decoded at mid cell setting the
encoder to DATA (the value of the rightmost bit of the serial
data register), and the serial data reqister is shifted riqht
one bit.
3)
~t
end cell, the bit counter increments, the encoder is com-
plemented, and the cell decode and variable modulus counters
are initialized.
The process is repeatp.d tor each of the eight data bits. AfteI' all
eight bits have been encoded, the bit counter, cell decode counter,
and the variable modulus counter are initialized. The serial data
register is loaded from the aata
110
buffer and BYTE RDY is set. If
BYTE ROY signal is already set, then data Is not loaded from the data
110
buffer and the same byte is recorded, shifted right one bit.