Mitsubishi A-Melsec A1FXCPU User Manual page 60

6. LOADING AND INSTALLATION
Y20
(2) Failsafe technique for a PLC failure
The PLC CPU module and memory failures are detected by the self-diagnostic
function, but a failure may not be detected by the CPU module if there is a fault in
the I/O control or other sections. In such a case, all points may turn on or off, or
the controlled system may not operate properly or safely at the worst.
In addition to our highest possible quality designed in the product, we ask the
user to configure up an external failsafe circuit to prevent machine damage or
accident if the PLC has failed for some reason.
A failsafe circuit example is given below.
Internal program
M9032
Y20
0.5 sec. 0.5 sec.
A1FXCPU
Extension module
/extension block
*1: As Y20 alternates on and off at intervals of 0.5 seconds, use a no-contact
extension module/extension block (transistors in the above example).
On-delay timer
Y20
Off-delay timer
External load
Y21
L
L
Y2F
24V
0V
T1
*1
6 - 11
MELSEC-A
T1
1 sec.
T2
1 sec.
MC
- +
24VDC
T2
MC