Microphone Amplifier; Transmit Amplifier - ozQRP MDT Construction Manual

Dsb transceiver
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Received signals from the antenna are fed to a broadly tuned band pass filter formed with L1,
C14 and C15. The values of C14 and C15 are selected to form a tuned circuit with L1 at 7MHz.
The ratio of C14 and C15 provide impedance matching between the tuned circuit and the 50
ohm antenna source. It also sets the loaded 'Q' of the tuned circuit and as a result the overall
filter bandwidth. The filter is connected to the receive pre-amplifier via a small 100pF coupling
capacitor (C13). The pre-amplifier stage is formed around transistor Q3 in a common emitter
configuration and provides around 10 times amplification. The collector load is winding two of
the mixer transformer T1, and here the signal is mixed with the carrier. The resultant audio
appears at the junction of D2 and D4.
6.3 M
ICROPHONE AMPLIFIER
Transistor Q7 is the microphone pre-amplifier with an input impedance of around 10K ohm and
a gain of around 40 set mainly by C34 and R28. C32 is included across the input to prevent RF
feeding into the amplifier. The amplified output appears across the 5K ohm trimpot (VR3) in the
collector. This becomes a pre-set microphone gain control, and the signal from the wiper is fed
to the microphone amplifier stage Q8. This stage only has a gain of around 3, but it's biased for
higher current and a low value collector resistor so it can drive the balanced modulator. C33 and
C36 provide heavy low pass filtering to limit the transmitted bandwidth.
If an Electret microphone is used, R25 provides a DC bias current and is enabled by shorting the
EL link. If a dynamic microphone is used the link is left open.
6.4 T
RANSMIT AMPLIFIER
Transmit signal from the mixer is applied to the driver stage built around transistor Q4. A
BD139 works well here when biased with about 50mA of collector current. The design is well
proven using both shunt and series feedback to provide low input and output impedance and
good stable gain on the low HF bands.
The power amplifier stage is formed from two BD139 transistors (Q5 and Q6) in parallel. They
operate in class B and provide up to 2 Watts PEP of power from a 13.8 V supply. The bases of
the transistors are held at around 0.6 volts DC by the voltage reference formed by R18 and
diode D6. This holds the transistors at or just below the point of conduction and so draw very
little current with no RF drive. The 1.5 ohm resistors in the emitters force the transistors to
share the load more equally, and provide a small amount of negative feedback which improves
stability and prevents thermal runaway.
The collector load for Q5 and Q6 is a toroidal inductor L2. The specified inductance was found to
provide maximum output into the low pass filter. The waveform from Q5 and Q6 can be high in
harmonics and so a 5 pole low pass filter is included to reduce the level of harmonic and other
spurious energy to an acceptable level. L4 and a 150pF capacitor form a parallel tuned circuit to
give sharp attenuation of the second harmonic.
As a visual indication of power output and modulation, the transmit signal is sampled by
capacitor C28 and ground referenced by R21. The signal is rectified by D9 and filtered by C29.
This drives the front panel LED via current limiting resistor R22.
MDT Construction Manual – Issue 2
Page 10

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