Casio SF-8500 Service Manual & Parts List page 18

When the voltage from the main batteries becomes +3.7V ±0.1V, the terminal VCOMP0 (Pin No.5) of
the power supply chip (LSI2) becomes "L" level, then this signal goes to the terminal PDN (Pin No.28)
of the GATE ARRAY (LSI3). After this, the terminal VOT (Pin No.32) of GATE ARRAY (LSI3) become
"L" level, and the terminal PDB (Pin No. 31) of the power supply chip (LSI2) receives this signal.
In this condition, the voltages for LCD will be cut off compulsorily.
When the voltage from the memory back-up battery becomes +2.5V±0.065V, the terminal SUBOUT
(Pin No.4) of the power supply chip (LCI2) becomes "L" level, and the terminal P6 (Pin No.78) of the
CPU (LSI1) detects the low battery condition. The display shows "MEMORY BACKUP BATTERY
GETTING WEAK".
6) Others
The voltages of the circuit are applied from the main batteries or the memory back-up battery by the
diode MA743 (D3). The voltage of memory back-up is also provided with the main batteries.
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